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20172022
most citedA Time-to-first-spike Coding and Conversion Aware Training for Energy-Efficient Deep Spiking Neural Network Processor Design

18 citations · 23 across the 4 of their papers we have counts for

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Showing 2020Show all

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cs.AR2020

Bit Parallel 6T SRAM In-memory Computing with Reconfigurable Bit-Precision

Kyeongho Lee, Jinho Jeong, Sungsoo Cheon +2

This paper presents 6T SRAM cell-based bit-parallel in-memory computing (IMC) architecture to support various computations with reconfigurable bit-precision. In the proposed techni…