79 citations · 208 across the 29 of their papers we have counts for
4 papers · 1 filter
HePGA: A Heterogeneous Processing-in-Memory based GNN Training Accelerator
Chukwufumnanya Ogbogu, Gaurav Narang, Biresh Kumar Joardar +3
Processing-In-Memory (PIM) architectures offer a promising approach to accelerate Graph Neural Network (GNN) training and inference. However, various PIM devices such as ReRAM, FeF…
Multi-Objective Optimization of ReRAM Crossbars for Robust DNN Inferencing under Stochastic Noise
Xiaoxuan Yang, Syrine Belakaria, Biresh Kumar Joardar +5
Resistive random-access memory (ReRAM) is a promising technology for designing hardware accelerators for deep neural network (DNN) inferencing. However, stochastic noise in ReRAM c…
Inter-Tier Process Variation-Aware Monolithic 3D NoC Architectures
Shouvik Musavvir, Anwesha Chatterjee, Ryan Gary Kim +2
Monolithic 3D (M3D) technology enables high density integration, performance, and energy-efficiency by sequentially stacking tiers on top of each other. M3D-based network-on-chip (…
Design-Space Exploration and Optimization of an Energy-Efficient and Reliable 3D Small-world Network-on-Chip
Sourav Das, Janardhan Rao Doppa, Partha Pratim Pande +1
A three-dimensional (3D) Network-on-Chip (NoC) enables the design of high performance and low power many-core chips. Existing 3D NoCs are inadequate for meeting the ever-increasing…