activity
20172026
most citedPrevention of Microarchitectural Covert Channels on an Open-Source 64-bit RISC-V Core

11 citations · 11 across the 4 of their papers we have counts for

collaborators

7 papers

cs.AR2026

TensorPool: A 3D-Stacked 8.4TFLOPS/4.3W Many-Core Domain-Specific Processor for AI-Native Radio Access Networks

Marco Bertuletti, Yichao Zhang, Diyou Shen +3

The upcoming integration of AI in the physical layer (PHY) of 6G radio access networks (RAN) will enable a higher quality of service in challenging transmission scenarios. However,…

cs.AR2025

Basilisk: A 34 mm2 End-to-End Open-Source 64-bit Linux-Capable RISC-V SoC in 130nm BiCMOS

Philippe Sauter, Thomas Benz, Paul Scheffler +3

End-to-end open-source electronic design automation (OSEDA) enables a collaborative approach to chip design conducive to supply chain diversification and zero-trust step-by-step de…

cs.AR2024

FlooNoC: A 645 Gbps/link 0.15 pJ/B/hop Open-Source NoC with Wide Physical Links and End-to-End AXI4 Parallel Multi-Stream Support

Tim Fischer, Michael Rogenmoser, Thomas Benz +2

The new generation of domain-specific AI accelerators is characterized by rapidly increasing demands for bulk data transfers, as opposed to small, latency-critical cache line trans…

cs.AR2020

Arnold: an eFPGA-Augmented RISC-V SoC for Flexible and Low-Power IoT End-Nodes

Pasquale Davide Schiavone, Davide Rossi, Alfio Di Mauro +5

A wide range of Internet of Things (IoT) applications require powerful, energy-efficient and flexible end-nodes to acquire data from multiple sources, process and distill the sense…

cs.CR202011 cited

Prevention of Microarchitectural Covert Channels on an Open-Source 64-bit RISC-V Core

Nils Wistoff, Moritz Schneider, Frank K. Gürkaynak +2

Covert channels enable information leakage across security boundaries of the operating system. Microarchitectural covert channels exploit changes in execution timing resulting from…

cs.DC2018

A Scalable Near-Memory Architecture for Training Deep Neural Networks on Large In-Memory Datasets

Fabian Schuiki, Michael Schaffner, Frank K. Gürkaynak +1

Most investigations into near-memory hardware accelerators for deep neural networks have primarily focused on inference, while the potential of accelerating training has received r…