4 citations · 5 across the 3 of their papers we have counts for
1 paper · 1 filter
Guanshun Yu, Tom Y. Cheng, Blayne Kettlewell +3
This paper outlines an FPGA VLSI design methodology that was used to realize a fully functioning FPGA chip in 130nm CMOS with improved routability and memory robustness. The archit…