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researcher

B. Hudec

3 papers hereh-index 181.7k citations53 works total

Matching runs newest-first, so older work may not be attached to this profile yet.

author position
  • middle author2

Across the 2 of 3 papers where every author was matched, so the position is known.

fields
  • cs.ET2
  • cs.LG1

identity via Semantic Scholar / OpenAlex

activity
20172020
most citedSLIM: Simultaneous Logic-in-Memory Computing Exploiting Bilayer Analog OxRAM Devices

1.5k citations · 1.6k across the 2 of their papers we have counts for

collaborators

3 papers

cs.ET2020

Methodology for Realizing VMM with Binary RRAM Arrays: Experimental Demonstration of Binarized-ADALINE Using OxRAM Crossbar

Sandeep Kaur Kingra, Vivek Parmar, Shubham Negi +4

In this paper, we present an efficient hardware mapping methodology for realizing vector matrix multiplication (VMM) on resistive memory (RRAM) arrays. Using the proposed VMM compu…

cs.ET2018★ 1.5k cited

SLIM: Simultaneous Logic-in-Memory Computing Exploiting Bilayer Analog OxRAM Devices

Sandeep Kaur Kingra, Vivek Parmar, Che-Chia Chang +3

Von Neumann architecture based computers isolate/physically separate computation and storage units i.e. data is shuttled between computation unit (processor) and memory unit to rea…

cs.LG2017★ 113 cited

Mitigating Asymmetric Nonlinear Weight Update Effects in Hardware Neural Network based on Analog Resistive Synapse

Chih-Cheng Chang, Pin-Chun Chen, Teyuh Chou +6

Asymmetric nonlinear weight update is considered as one of the major obstacles for realizing hardware neural networks based on analog resistive synapses because it significantly co…

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Not affiliated with arXiv. Researcher data from Semantic Scholar (ODC-BY) and OpenAlex.