3 papers
cs.AR2026
Revisiting Hardware Priority Queue Architectures
Qihang Wu, Austin Rovinski
Priority queues - data structures that serve elements based on priority rather than insertion order - are fundamental in a wide range of applications, including operating systems,…
cs.AR2026
CLIPGen: A Chiplet Link IP Modeling and Generation Framework for 2.5D Architecture Exploration
Zhengping Zhu, Austin Rovinski
Advanced 2.5D Systems-in-Package (SiPs) compose a growing portion of high-performance systems. While the packaging and interconnect choices play a large role in the overall system…
cs.AR2025
Accelerating Detailed Routing Convergence through Offline Reinforcement Learning
Afsara Khan, Austin Rovinski
Detailed routing remains one of the most complex and time-consuming steps in modern physical design due to the challenges posed by shrinking feature sizes and stricter design rules…