activity
20172026
most citedDalorex: A Data-Local Program Execution and Architecture for Memory-bound Applications

23 citations · 74 across the 16 of their papers we have counts for

collaborators
Showing 2023Show all

7 papers · 1 filter

cs.AR2023★ 3 cited

A Hardware Evaluation Framework for Large Language Model Inference

Hengrui Zhang, August Ning, Rohan Prabhakar +1

The past year has witnessed the increasing popularity of Large Language Models (LLMs). Their unprecedented scale and associated high hardware cost have impeded their broader adopti…

cs.AR2023

Muchisim: A Simulation Framework for Design Exploration of Multi-Chip Manycore Systems

Marcelo Orenes-Vera, Esin Tureci, Margaret Martonosi +1

The design space exploration of scaled-out manycores for communication-intensive applications (e.g., graph analytics and sparse linear algebra) is hampered due to either lack of sc…

cs.AR2023★ 1 cited

Tascade: Hardware Support for Atomic-free, Asynchronous and Efficient Reduction Trees

Marcelo Orenes-Vera, Esin Tureci, David Wentzlaff +1

Graph search and sparse data-structure traversal workloads contain challenging irregular memory patterns on global data structures that need to be modified atomically. Distributed…

cs.AR2023★ 1 cited

DCRA: A Distributed Chiplet-based Reconfigurable Architecture for Irregular Applications

Marcelo Orenes-Vera, Esin Tureci, Margaret Martonosi +1

In recent years, the growing demand to process large graphs and sparse datasets has led to increased research efforts to develop hardware- and software-based architectural solution…

cs.AR2023★ 14 cited

Using LLMs to Facilitate Formal Verification of RTL

Marcelo Orenes-Vera, Margaret Martonosi, David Wentzlaff

Formal property verification (FPV) has existed for decades and has been shown to be effective at finding intricate RTL bugs. However, formal properties, such as those written as Sy…

cs.DC2023★ 2 cited

Massive Data-Centric Parallelism in the Chiplet Era

Marcelo Orenes-Vera, Esin Tureci, David Wentzlaff +1

Recent works have introduced task-based parallelization schemes to accelerate graph search and sparse data-structure traversal, where some solutions scale up to thousands of proces…

cs.AR2023★ 7 cited

Duet: Creating Harmony between Processors and Embedded FPGAs

Ang Li, August Ning, David Wentzlaff

The demise of Moore's Law has led to the rise of hardware acceleration. However, the focus on accelerating stable algorithms in their entirety neglects the abundant fine-grained ac…