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researcher

Zeshan A. Chishti

3 papers hereh-index 233k citations40 works total

Matching runs newest-first, so older work may not be attached to this profile yet.

author position
  • middle author3

Across the 3 of 3 papers where every author was matched, so the position is known.

fields
  • cs.AR3

identity via Semantic Scholar / OpenAlex

activity
20172019
most citedImproving DRAM Performance by Parallelizing Refreshes with Accesses

150 citations · 150 across the 2 of their papers we have counts for

collaborators

3 papers

cs.AR2019

TicToc: Enabling Bandwidth-Efficient DRAM Caching for both Hits and Misses in Hybrid Memory Systems

Vinson Young, Zeshan Chishti, Moinuddin K. Qureshi

This paper investigates bandwidth-efficient DRAM caching for hybrid DRAM + 3D-XPoint memories. 3D-XPoint is becoming a viable alternative to DRAM as it enables high-capacity and no…

cs.AR2018

Reducing DRAM Refresh Overheads with Refresh-Access Parallelism

K. K. Chang, D. Lee, Z. Chishti +4

This article summarizes the idea of "refresh-access parallelism," which was published in HPCA 2014, and examines the work's significance and future potential. The overarching objec…

cs.AR2017★ 150 cited

Improving DRAM Performance by Parallelizing Refreshes with Accesses

Kevin K. Chang, Donghyuk Lee, Zeshan Chishti +4

Modern DRAM cells are periodically refreshed to prevent data loss due to leakage. Commodity DDR DRAM refreshes cells at the rank level. This degrades performance significantly beca…

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