23 citations · 60 across the 14 of their papers we have counts for
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eess.SP2017
Reconfigurable Digital Channelizer Design Using Factored Markov Decision Processes
A. Sapio, L. Li, J. Wu +2
In this work, a novel digital channelizer design is developed through the use of a compact, system-level modeling approach. The model efficiently captures key properties of a digit…
eess.SP2017★ 2 cited
Memory-constrained Vectorization and Scheduling of Dataflow Graphs for Hybrid CPU-GPU Platforms
Shuoxin Lin, Jiahao Wu, Shuvra S. Bhattacharyya
The increasing use of heterogeneous embedded systems with multi-core CPUs and Graphics Processing Units (GPUs) presents important challenges in effectively exploiting pipeline, tas…