activity
20172021
most citedCDCL-inspired Word-level Learning for Bit-vector Constraint Solving

5 citations · 9 across the 4 of their papers we have counts for

collaborators

11 papers

cs.PL2021

Interface Compliance of Inline Assembly: Automatically Check, Patch and Refine

Frédéric Recoules, Sébastien Bardin, Richard Bonichon +3

Inline assembly is still a common practice in low-level C programming, typically for efficiency reasons or for accessing specific hardware resources. Such embedded assembly codes i…

cs.CR20213 cited

AI-based Blackbox Code Deobfuscation: Understand, Improve and Mitigate

Grégoire Menguy, Sébastien Bardin, Richard Bonichon +1

Code obfuscation aims at protecting Intellectual Property and other secrets embedded into software from being retrieved. Recent works leverage advances in artificial intelligence w…

cs.CR2020

No Crash, No Exploit: Automated Verification of Embedded Kernels

Olivier Nicole, Matthieu Lemerre, Sébastien Bardin +1

The kernel is the most safety- and security-critical component of many computer systems, as the most severe bugs lead to complete system crash or exploit. It is thus desirable to g…

cs.CR2020

Automatically Proving Microkernels Free from Privilege Escalation from their Executable

Olivier Nicole, Matthieu Lemerre, Sébastien Bardin +1

Operating system kernels are the security keystone of most computer systems, as they provide the core protection mechanisms. Kernels are in particular responsible for their own sec…

cs.CR2020

Binary-level Directed Fuzzing for Use-After-Free Vulnerabilities

Manh-Dung Nguyen, Sébastien Bardin, Richard Bonichon +2

Directed fuzzing focuses on automatically testing specific parts of the code by taking advantage of additional information such as (partial) bug stack trace, patches or risky opera…

cs.CR2019

Binsec/Rel: Efficient Relational Symbolic Execution for Constant-Time at Binary-Level

Lesly-Ann Daniel, Sébastien Bardin, Tamara Rezk

The constant-time programming discipline (CT) is an efficient countermeasure against timing side-channel attacks, requiring the control flow and the memory accesses to be independe…