2 papers
eess.SY2021
FPGA-based Implementation of a New Data Frame Correction System for Merging Units
Mohammad Hashemi, Bijan Alizadeh
With today's increasing demand for digital devices in Substation Automation Systems (SAS) based on the IEC61850 standard, the measured data error due to the synchronization problem…
cs.AR2017
Automated Formal Equivalence Verification of Pipelined Nested Loops in Datapath Designs
Payman Behnam, Bijan Alizadeh, Sajjad Taheri
In this paper, we present an efficient formal approach to check the equivalence of synthesized RTL against the high-level specification in the presence of pipelining transformation…