9 citations · 18 across the 7 of their papers we have counts for
7 papers
Zero-Space Cost Fault Tolerance for Transformer-based Language Models on ReRAM
Bingbing Li, Geng Yuan, Zigeng Wang +6
Resistive Random Access Memory (ReRAM) has emerged as a promising platform for deep neural networks (DNNs) due to its support for parallel in-situ matrix-vector multiplication. How…
Ethosight: A Reasoning-Guided Iterative Learning System for Nuanced Perception based on Joint-Embedding & Contextual Label Affinity
Hugo Latapie, Shan Yu, Patrick Hammer +14
Traditional computer vision models often necessitate extensive data acquisition, annotation, and validation. These models frequently struggle in real-world applications, resulting…
Subgraph Stationary Hardware-Software Inference Co-Design
Payman Behnam, Jianming Tong, Alind Khare +6
A growing number of applications depend on Machine Learning (ML) functionality and benefits from both higher quality ML predictions and better timeliness (latency) at the same time…
An Algorithm-Hardware Co-design Framework to Overcome Imperfections of Mixed-signal DNN Accelerators
Payman Behnam, Uday Kamal, Saibal Mukhopadhyay
In recent years, processing in memory (PIM) based mixedsignal designs have been proposed as energy- and area-efficient solutions with ultra high throughput to accelerate DNN comput…
FORMS: Fine-grained Polarized ReRAM-based In-situ Computation for Mixed-signal DNN Accelerator
Geng Yuan, Payman Behnam, Zhengang Li +8
Recent works demonstrated the promise of using resistive random access memory (ReRAM) as an emerging technology to perform inherently parallel analog domain in-situ matrix-vector m…
Validation of Hardware Security and Trust: A Survey
Payman Behnam
With ever advancing in digital system, security has been emerged as a major concern. Many researchers all around the world come up with solutions to address various challenges that…
Automated Formal Equivalence Verification of Pipelined Nested Loops in Datapath Designs
Payman Behnam, Bijan Alizadeh, Sajjad Taheri
In this paper, we present an efficient formal approach to check the equivalence of synthesized RTL against the high-level specification in the presence of pipelining transformation…