19 citations · 29 across the 17 of their papers we have counts for
18 papers
NVIDIA Nemotron 3: Efficient and Open Intelligence
NVIDIA, :, Aaron Blakeman +356
We introduce the Nemotron 3 family of models - Nano, Super, and Ultra. These models deliver strong agentic, reasoning, and conversational capabilities. The Nemotron 3 family uses a…
Memory-Efficient Vision Transformers: An Activation-Aware Mixed-Rank Compression Strategy
Seyedarmin Azizi, Mahdi Nazemi, Massoud Pedram
As Vision Transformers (ViTs) increasingly set new benchmarks in computer vision, their practical deployment on inference engines is often hindered by their significant memory band…
Low-Precision Mixed-Computation Models for Inference on Edge
Seyedarmin Azizi, Mahdi Nazemi, Mehdi Kamal +1
This paper presents a mixed-computation neural network processing approach for edge applications that incorporates low-precision (low-width) Posit and low-precision fixed point (Fi…
Sensitivity-Aware Mixed-Precision Quantization and Width Optimization of Deep Neural Networks Through Cluster-Based Tree-Structured Parzen Estimation
Seyedarmin Azizi, Mahdi Nazemi, Arash Fayyazi +1
As the complexity and computational demands of deep learning models rise, the need for effective optimization methods for neural network designs becomes paramount. This work introd…
NeuroBlend: Towards Low-Power yet Accurate Neural Network-Based Inference Engine Blending Binary and Fixed-Point Convolutions
Arash Fayyazi, Mahdi Nazemi, Arya Fayyazi +1
This paper introduces NeuroBlend, a novel neural network architecture featuring a unique building block known as the Blend module. This module incorporates binary and fixed-point c…
Algorithms and Hardware for Efficient Processing of Logic-based Neural Networks
Jingkai Hong, Arash Fayyazi, Amirhossein Esmaili +2
Recent efforts to improve the performance of neural network (NN) accelerators that meet today's application requirements have given rise to a new trend of logic-based NN inference…
Efficient Compilation and Mapping of Fixed Function Combinational Logic onto Digital Signal Processors Targeting Neural Network Inference and Utilizing High-level Synthesis
Soheil Nazar Shahsavani, Arash Fayyazi, Mahdi Nazemi +1
Recent efforts for improving the performance of neural network (NN) accelerators that meet today's application requirements have given rise to a new trend of logic-based NN inferen…
NullaNet Tiny: Ultra-low-latency DNN Inference Through Fixed-function Combinational Logic
Mahdi Nazemi, Arash Fayyazi, Amirhossein Esmaili +3
While there is a large body of research on efficient processing of deep neural networks (DNNs), ultra-low-latency realization of these models for applications with stringent, sub-m…
A Tunable Robust Pruning Framework Through Dynamic Network Rewiring of DNNs
Souvik Kundu, Mahdi Nazemi, Peter A. Beerel +1
This paper presents a dynamic network rewiring (DNR) method to generate pruned deep neural network (DNN) models that are robust against adversarial attacks yet maintain high accura…
SynergicLearning: Neural Network-Based Feature Extraction for Highly-Accurate Hyperdimensional Learning
Mahdi Nazemi, Amirhossein Esmaili, Arash Fayyazi +1
Machine learning models differ in terms of accuracy, computational/memory complexity, training time, and adaptability among other characteristics. For example, neural networks (NNs…
Pre-defined Sparsity for Low-Complexity Convolutional Neural Networks
Souvik Kundu, Mahdi Nazemi, Massoud Pedram +2
The high energy cost of processing deep convolutional neural networks impedes their ubiquitous deployment in energy-constrained platforms such as embedded systems and IoT devices.…
Energy-Aware Scheduling of Task Graphs with Imprecise Computations and End-to-End Deadlines
Amirhossein Esmaili, Mahdi Nazemi, Massoud Pedram
Imprecise computations provide an avenue for scheduling algorithms developed for energy-constrained computing devices by trading off output quality with the utilization of system r…
Modeling Processor Idle Times in MPSoC Platforms to Enable Integrated DPM, DVFS, and Task Scheduling Subject to a Hard Deadline
Amirhossein Esmaili, Mahdi Nazemi, Massoud Pedram
Energy efficiency is one of the most critical design criteria for modern embedded systems such as multiprocessor system-on-chips (MPSoCs). Dynamic voltage and frequency scaling (DV…
NullaNet: Training Deep Neural Networks for Reduced-Memory-Access Inference
Mahdi Nazemi, Ghasem Pasandi, Massoud Pedram
Deep neural networks have been successfully deployed in a wide variety of applications including computer vision and speech recognition. However, computational and storage complexi…
Deploying Customized Data Representation and Approximate Computing in Machine Learning Applications
Mahdi Nazemi, Massoud Pedram
Major advancements in building general-purpose and customized hardware have been one of the key enablers of versatility and pervasiveness of machine learning models such as deep ne…
A Hardware-Friendly Algorithm for Scalable Training and Deployment of Dimensionality Reduction Models on FPGA
Mahdi Nazemi, Amir Erfan Eshratifar, Massoud Pedram
With ever-increasing application of machine learning models in various domains such as image classification, speech recognition and synthesis, and health care, designing efficient…
FFT-Based Deep Learning Deployment in Embedded Systems
Sheng Lin, Ning Liu, Mahdi Nazemi +4
Deep learning has delivered its powerfulness in many application domains, especially in image and speech recognition. As the backbone of deep learning, deep neural networks (DNNs)…
High-Performance FPGA Implementation of Equivariant Adaptive Separation via Independence Algorithm for Independent Component Analysis
Mahdi Nazemi, Shahin Nazarian, Massoud Pedram
Independent Component Analysis (ICA) is a dimensionality reduction technique that can boost efficiency of machine learning models that deal with probability density functions, e.g.…