79 citations · 194 across the 39 of their papers we have counts for
4 papers · 1 filter
ReVolt: Power Delivery Network-Aware Voltage Droop Control for 2.5D PIM Chiplet Architectures
Vibhanshu Sharma, Alish Kanani, Miao Sun +3
Processing-in-memory (PIM)-based 2.5D multi-chiplet platforms are enablers for machine learning (ML) workloads. However, their performance is affected by the power delivery network…
ThAME: 3D Memory-Enabled Heterogeneous Accelerator for LLM Mixture of Experts
Pratyush Dhingra, Pramit Kumar Pal, Janardhan Rao Doppa +1
Mixture of Experts (MoE) architectures have emerged as a dominant paradigm for scaling Large Language Models (LLMs). However, MoE inference on conventional hardware is constrained…
ADEPT: Architecture-Driven Energy-Efficient CNN Fine-Tuning on PIM Accelerators
Pratyush Dhingra, Vibhanshu Sharma, Janardhan Rao Doppa +1
Processing-in-memory-based (PIM) architectures have emerged as a promising solution for accelerating Convolutional Neural Network (CNN) workloads at the edge. Fine-tuning pre-train…
ThRIve: Thermally Robust CNN Inference via Low-Rank Adaptation in Heterogeneous PIM Architectures
Vibhanshu Sharma, Pratyush Dhingra, Janardhan Rao Doppa +1
Processing-In-Memory (PIM) has emerged as a promising technology for accelerating machine learning (ML) workloads. Specifically, non-volatile memory-based PIM architectures have en…