1 citations · 1 across the 4 of their papers we have counts for
4 papers
Hierarchical Spline-Based Bayesian Beta-Binomial Regression for Estimating Time-Varying Risk in Power Outages
Justin Jacobs, Jesse Piburn, Aaron Myers
We propose a hierarchical Bayesian model for estimating time-varying outage risk from county-level power outage data. The model combines cubic B-spline basis functions with a Beta-…
Seed Layer Engineering for Effective Charge Transfer Doping of MoS Transistors
Sahej Sharma, Shao-Heng Yang, Himani Jawa +13
Integrating two-dimensional semiconductors such as MoS with dielectric materials remains a central challenge for their use in future logic technologies. While seed layers are t…
Scaling Two-Dimensional Semiconductor Nanoribbons for High-Performance Electronics
Hao-Yu Lan, Shao-Heng Yang, Yongjae Cho +10
As silicon transistors scale toward future technology nodes, three-dimensional architectures -- including gate-all-around (GAA) nanoribbon and complementary field-effect transistor…
Experimental Demonstration of an On-Chip CMOS-Integrated 3T-1MTJ Probabilistic Bit -- A P-Bit
Xuejian Zhang, John Arnesh Divakaruni Daniel, Neil Dilley +2
Ongoing semiconductor scaling challenges and the rise of neuromorphic computing have sparked interest in exploring novel computing schemes to achieve higher power efficiency and co…