2 papers
cs.PL2025
VerilogMonkey: Exploring Parallel Scaling for Automated Verilog Code Generation with LLMs
Juxin Niu, Yuxin Du, Dan Niu +3
We present VerilogMonkey, an empirical study of parallel scaling for the under-explored task of automated Verilog generation. Parallel scaling improves LLM performance by sampling…
cs.AI2025
ReChisel: Effective Automatic Chisel Code Generation by LLM with Reflection
Juxin Niu, Xiangfeng Liu, Dan Niu +3
Coding with hardware description languages (HDLs) such as Verilog is a time-intensive and laborious task. With the rapid advancement of large language models (LLMs), there is incre…