7 citations · 20 across the 14 of their papers we have counts for
13 papers · 1 filter
RTL-Breaker: Assessing the Security of LLMs against Backdoor Attacks on HDL Code Generation
Lakshmi Likhitha Mankali, Jitendra Bhandari, Manaar Alam +4
Large language models (LLMs) have demonstrated remarkable potential with code generation/completion tasks for hardware design. In fact, LLM-based hardware description language (HDL…
ASCENT: Amplifying Power Side-Channel Resilience via Learning & Monte-Carlo Tree Search
Jitendra Bhandari, Animesh Basak Chowdhury, Mohammed Nabeel +4
Power side-channel (PSC) analysis is pivotal for securing cryptographic hardware. Prior art focused on securing gate-level netlists obtained as-is from chip design automation, negl…
AutoLock: Automatic Design of Logic Locking with Evolutionary Computation
Zeng Wang, Lilas Alrahis, Dominik Sisejkovic +1
Logic locking protects the integrity of hardware designs throughout the integrated circuit supply chain. However, recent machine learning (ML)-based attacks have challenged its fun…
FPGA-Patch: Mitigating Remote Side-Channel Attacks on FPGAs using Dynamic Patch Generation
Mahya Morid Ahmadi, Lilas Alrahis, Ozgur Sinanoglu +1
We propose FPGA-Patch, the first-of-its-kind defense that leverages automated program repair concepts to thwart power side-channel attacks on cloud FPGAs. FPGA-Patch generates isof…
Graph Neural Networks for Hardware Vulnerability Analysis -- Can you Trust your GNN?
Lilas Alrahis, Ozgur Sinanoglu
The participation of third-party entities in the globalized semiconductor supply chain introduces potential security vulnerabilities, such as intellectual property piracy and hardw…
PoisonedGNN: Backdoor Attack on Graph Neural Networks-based Hardware Security Systems
Lilas Alrahis, Satwik Patnaik, Muhammad Abdullah Hanif +2
Graph neural networks (GNNs) have shown great success in detecting intellectual property (IP) piracy and hardware Trojans (HTs). However, the machine learning community has demonst…