activity
20072022
most citedFINN: A Framework for Fast, Scalable Binarized Neural Network Inference

1k citations · 1.2k across the 12 of their papers we have counts for

collaborators

12 papers

cs.LG2022★ 1 cited

EcoFlow: Efficient Convolutional Dataflows for Low-Power Neural Network Accelerators

Lois Orosa, Skanda Koppula, Yaman Umuroglu +5

Dilated and transposed convolutions are widely used in modern convolutional neural networks (CNNs). These kernels are used extensively during CNN training and inference of applicat…

cs.LG2020

FAT: Training Neural Networks for Reliable Inference Under Hardware Faults

Ussama Zahid, Giulio Gambardella, Nicholas J. Fraser +2

Deep neural networks (DNNs) are state-of-the-art algorithms for multiple applications, spanning from image classification to speech recognition. While providing excellent accuracy,…

cs.DC2020

Vyasa: A High-Performance Vectorizing Compiler for Tensor Convolutions on the Xilinx AI Engine

Prasanth Chatarasi, Stephen Neuendorffer, Samuel Bayliss +2

Xilinx's AI Engine is a recent industry example of energy-efficient vector processing that includes novel support for 2D SIMD datapaths and shuffle interconnection network. The cur…

eess.SP2019★ 39 cited

Efficient Error-Tolerant Quantized Neural Network Accelerators

Giulio Gambardella, Johannes Kappauf, Michaela Blott +4

Neural Networks are currently one of the most widely deployed machine learning algorithms. In particular, Convolutional Neural Networks (CNNs), are gaining popularity and are evalu…

cs.CV2019★ 1 cited

Comparing Energy Efficiency of CPU, GPU and FPGA Implementations for Vision Kernels

Murad Qasaimeh, Kristof Denolf, Jack Lo +3

Developing high performance embedded vision applications requires balancing run-time performance with energy constraints. Given the mix of hardware accelerators that exist for embe…

cs.CV2018★ 100 cited

Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs

Yifan Yang, Qijing Huang, Bichen Wu +8

Using FPGAs to accelerate ConvNets has attracted significant attention in recent years. However, FPGA accelerator design has not leveraged the latest progress of ConvNets. As a res…

cs.AR2018★ 30 cited

FINN-R: An End-to-End Deep-Learning Framework for Fast Exploration of Quantized Neural Networks

Michaela Blott, Thomas Preusser, Nicholas Fraser +3

Convolutional Neural Networks have rapidly become the most successful machine learning algorithm, enabling ubiquitous machine vision and intelligent decisions on even embedded comp…

cs.CV2017★ 6 cited

Scaling Binarized Neural Networks on Reconfigurable Logic

Nicholas J. Fraser, Yaman Umuroglu, Giulio Gambardella +4

Binarized neural networks (BNNs) are gaining interest in the deep learning community due to their significantly lower computational and memory cost. They are particularly well suit…

cs.CV2016★ 1k cited

FINN: A Framework for Fast, Scalable Binarized Neural Network Inference

Yaman Umuroglu, Nicholas J. Fraser, Giulio Gambardella +4

Research has shown that convolutional neural networks contain significant redundancy, and high classification accuracy can be obtained even when weights and activations are reduced…

cs.DC2015★ 8 cited

Coarse-Grain Performance Estimator for Heterogeneous Parallel Computing Architectures like Zynq All-Programmable SoC

Daniel Jiménez-González, Carlos Álvarez, Antonio Filgueras +4

Heterogeneous computing is emerging as a mandatory requirement for power-efficient system design. With this aim, modern heterogeneous platforms like Zynq All-Programmable SoC, that…

cs.OH2014★ 6 cited

High-Level Synthesis Case Study: Implementation of a Memcached Server

Kimon Karras, Michaela Blott, Kees Vissers

High-Level Synthesis (HLS) aspires to raise the level of abstraction in hardware design without sacrificing hardware efficiency. It has so far been successfully employed in signal…

cs.AR2007

Optimized Generation of Data-Path from C Codes for FPGAs

Zhi Guo, Betul Buyukkurt, Walid Najjar +1

FPGAs, as computing devices, offer significant speedup over microprocessors. Furthermore, their configurability offers an advantage over traditional ASICs. However, they do not yet…