39 citations · 46 across the 7 of their papers we have counts for
7 papers · 1 filter
Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs
Yifan Yang, Qijing Huang, Bichen Wu +8
Using FPGAs to accelerate ConvNets has attracted significant attention in recent years. However, FPGA accelerator design has not leveraged the latest progress of ConvNets. As a res…
Accuracy to Throughput Trade-offs for Reduced Precision Neural Networks on Reconfigurable Logic
Jiang Su, Nicholas J. Fraser, Giulio Gambardella +5
Modern CNN are typically based on floating point linear algebra based implementations. Recently, reduced precision NN have been gaining popularity as they require significantly les…
FINN-L: Library Extensions and Design Trade-off Analysis for Variable Precision LSTM Networks on FPGAs
Vladimir Rybalkin, Alessandro Pappalardo, Muhammad Mohsin Ghaffar +3
It is well known that many types of artificial neural networks, including recurrent networks, can achieve a high classification accuracy even with low-precision weights and activat…
SYQ: Learning Symmetric Quantization For Efficient Deep Neural Networks
Julian Faraone, Nicholas Fraser, Michaela Blott +1
Inference for state-of-the-art deep neural networks is computationally expensive, making them difficult to deploy on constrained hardware environments. An efficient way to reduce t…
Scaling Neural Network Performance through Customized Hardware Architectures on Reconfigurable Logic
Michaela Blott, Thomas B. Preusser, Nicholas Fraser +4
Convolutional Neural Networks have dramatically improved in recent years, surpassing human accuracy on certain problems and performance exceeding that of traditional computer visio…
Compressing Low Precision Deep Neural Networks Using Sparsity-Induced Regularization in Ternary Networks
Julian Faraone, Nicholas Fraser, Giulio Gambardella +2
A low precision deep neural network training technique for producing sparse, ternary neural networks is presented. The technique incorporates hard- ware implementation costs during…