67 citations · 141 across the 18 of their papers we have counts for
19 papers
Zeno: A Scalable Capability-Based Secure Architecture
Alan Ehret, Jacob Abraham, Mihailo Isakov +1
Despite the numerous efforts of security researchers, memory vulnerabilities remain a top issue for modern computing systems. Capability-based solutions aim to solve whole classes…
A Taxonomy of Error Sources in HPC I/O Machine Learning Models
Mihailo Isakov, Mikaela Currier, Eliakin del Rosario +6
I/O efficiency is crucial to productivity in scientific computing, but the increasing complexity of the system and the applications makes it difficult for practitioners to understa…
Fast Arithmetic Hardware Library For RLWE-Based Homomorphic Encryption
Rashmi Agrawal, Lake Bu, Alan Ehret +1
In this work, we propose an open-source, first-of-its-kind, arithmetic hardware library with a focus on accelerating the arithmetic operations involved in Ring Learning with Error…
NeuroFabric: Identifying Ideal Topologies for Training A Priori Sparse Networks
Mihailo Isakov, Michel A. Kinsy
Long training times of deep neural networks are a bottleneck in machine learning research. The major impediment to fast training is the quadratic growth of both memory and compute…
Drndalo: Lightweight Control Flow Obfuscation Through Minimal Processor/Compiler Co-Design
Novak Boskov, Mihailo Isakov, Michel A. Kinsy
Binary analysis is traditionally used in the realm of malware detection. However, the same technique may be employed by an attacker to analyze the original binaries in order to rev…
A Secure and Robust Scheme for Sharing Confidential Information in IoT Systems
Lake Bu, Mihailo Isakov, Michel A. Kinsy
In Internet of Things (IoT) systems with security demands, there is often a need to distribute sensitive information (such as encryption keys, digital signatures, or login credenti…
Survey of Attacks and Defenses on Edge-Deployed Neural Networks
Mihailo Isakov, Vijay Gadepally, Karen M. Gettings +1
Deep Neural Network (DNN) workloads are quickly moving from datacenters onto edge devices, for latency, privacy, or energy reasons. While datacenter networks can be protected using…
BRISC-V: An Open-Source Architecture Design Space Exploration Toolbox
Sahan Bandara, Alan Ehret, Donato Kava +1
In this work, we introduce a platform for register-transfer level (RTL) architecture design space exploration. The platform is an open-source, parameterized, synthesizable set of R…
Post-Quantum Cryptographic Hardware Primitives
Lake Bu, Rashmi Agrawal, Hai Cheng +1
The development and implementation of post-quantum cryptosystems have become a pressing issue in the design of secure computing systems, as general quantum computers have become mo…
A Lightweight McEliece Cryptosystem Co-processor Design
Lake Bu, Rashmi Agrawal, Hai Cheng +1
Due to the rapid advances in the development of quantum computers and their susceptibility to errors, there is a renewed interest in error correction algorithms. In particular, err…
CodeTrolley: Hardware-Assisted Control Flow Obfuscation
Novak Boskov, Mihailo Isakov, Michel A. Kinsy
Many cybersecurity attacks rely on analyzing a binary executable to find exploitable sections of code. Code obfuscation is used to prevent attackers from reverse engineering these…
BRISC-V Emulator: A Standalone, Installation-Free, Browser-Based Teaching Tool
Mihailo Isakov, Michel A. Kinsy
Many computer organization and computer architecture classes have recently started adopting the RISC-V architecture as an alternative to proprietary RISC ISAs and architectures. Em…
Design Space Exploration of Neural Network Activation Function Circuits
Tao Yang, Yadong Wei, Zhijun Tu +4
The widespread application of artificial neural networks has prompted researchers to experiment with FPGA and customized ASIC designs to speed up their computation. These implement…
SAPA: Self-Aware Polymorphic Architecture
Michel A. Kinsy, Mihailo Isakov, Alan Ehret +1
In this work, we introduce a Self-Aware Polymorphic Architecture (SAPA) design approach to support emerging context-aware applications and mitigate the programming challenges cause…
Sphinx: A Secure Architecture Based on Binary Code Diversification and Execution Obfuscation
Michel A. Kinsy, Donato Kava, Alan Ehret +1
Sphinx, a hardware-software co-design architecture for binary code and runtime obfuscation. The Sphinx architecture uses binary code diversification and self-reconfigurable process…
ClosNets: a Priori Sparse Topologies for Faster DNN Training
Mihailo Isakov, Michel A. Kinsy
Fully-connected layers in deep neural networks (DNN) are often the throughput and power bottleneck during training. This is due to their large size and low data reuse. Pruning dens…
Janus: An Uncertain Cache Architecture to Cope with Side Channel Attacks
Hossein Hosseinzadeh, Mihailo Isakov, Mostafa Darabi +2
Side channel attacks are a major class of attacks to crypto-systems. Attackers collect and analyze timing behavior, I/O data, or power consumption in these systems to undermine the…
Fast Processing of Large Graph Applications Using Asynchronous Architecture
Michel A. Kinsy, Rashmi S. Agrawal, Hien D. Nguyen
Graph algorithms and techniques are increasingly being used in scientific and commercial applications to express relations and explore large data sets. Although conventional or com…
FASHION: Fault-Aware Self-Healing Intelligent On-chip Network
Pengju Ren, Michel A. Kinsy, Mengjiao Zhu +5
To avoid packet loss and deadlock scenarios that arise due to faults or power gating in multicore and many-core systems, the network-on-chip needs to possess resilient communicatio…