36 citations · 149 across the 13 of their papers we have counts for
13 papers
libtxsize -- a library for automated Bitcoin transaction-size estimates
Johannes Hofmann
This paper presents libtxsize, a library to estimate the size requirements of arbitrary Bitcoin transactions. To account for different use cases, the library provides estimates in…
Understanding HPC Benchmark Performance on Intel Broadwell and Cascade Lake Processors
Christie L. Alappat, Johannes Hofmann, Georg Hager +3
Hardware platforms in high performance computing are constantly getting more complex to handle even when considering multicore CPUs alone. Numerous features and configuration optio…
Bridging the Architecture Gap: Abstracting Performance-Relevant Properties of Modern Server Processors
Johannes Hofmann, Christie L. Alappat, Georg Hager +2
We describe a universal modeling approach for predicting single- and multicore runtime of steady-state loops on server processors. To this end we strictly differentiate between app…
Automated Instruction Stream Throughput Prediction for Intel and AMD Microarchitectures
Jan Laukemann, Julian Hammer, Johannes Hofmann +2
An accurate prediction of scheduling and execution of instruction streams is a necessary prerequisite for predicting the in-core performance behavior of throughput-bound loop kerne…
On the accuracy and usefulness of analytic energy models for contemporary multicore processors
Johannes Hofmann, Georg Hager, Dietmar Fey
This paper presents refinements to the execution-cache-memory performance model and a previously published power model for multicore processors. The combination of both enables a v…
An analysis of core- and chip-level architectural features in four generations of Intel server processors
Johannes Hofmann, Georg Hager, Gerhard Wellein +1
This paper presents a survey of architectural features among four generations of Intel server processors (Sandy Bridge, Ivy Bridge, Haswell, and Broad- well) with a focus on perfor…
An ECM-based energy-efficiency optimization approach for bandwidth-limited streaming kernels on recent Intel Xeon processors
Johannes Hofmann, Dietmar Fey
We investigate an approach that uses low-level analysis and the execution-cache-memory (ECM) performance model in combination with tuning of hardware parameters to lower energy req…
Performance analysis of the Kahan-enhanced scalar product on current multi- and manycore processors
Johannes Hofmann, Dietmar Fey, Michael Riedmann +3
We investigate the performance characteristics of a numerically enhanced scalar product (dot) kernel loop that uses the Kahan algorithm to compensate for numerical errors, and desc…
Analysis of Intel's Haswell Microarchitecture Using The ECM Model and Microbenchmarks
Johannes Hofmann, Dietmar Fey, Jan Eitzinger +2
This paper presents an in-depth analysis of Intel's Haswell microarchitecture for streaming loop kernels. Among the new features examined is the dual-ring Uncore design, Cluster-on…
Execution-Cache-Memory Performance Model: Introduction and Validation
Johannes Hofmann, Jan Eitzinger, Dietmar Fey
This report serves two purposes: To introduce and validate the Execution-Cache-Memory (ECM) performance model and to provide a thorough analysis of current Intel processor architec…
Performance analysis of the Kahan-enhanced scalar product on current multicore processors
Johannes Hofmann, Dietmar Fey, Jan Eitzinger +2
We investigate the performance characteristics of a numerically enhanced scalar product (dot) kernel loop that uses the Kahan algorithm to compensate for numerical errors, and desc…
Comparing the Performance of Different x86 SIMD Instruction Sets for a Medical Imaging Application on Modern Multi- and Manycore Chips
Johannes Hofmann, Jan Treibig, Georg Hager +1
Single Instruction, Multiple Data (SIMD) vectorization is a major driver of performance in current architectures, and is mandatory for achieving good performance with codes that ar…
Performance Engineering for a Medical Imaging Application on the Intel Xeon Phi Accelerator
Johannes Hofmann, Jan Treibig, Georg Hager +1
We examine the Xeon Phi, which is based on Intel's Many Integrated Cores architecture, for its suitability to run the FDK algorithm--the most commonly used algorithm to perform the…