activity
20172026
most citedExact Synthesis of Reversible Logic Circuits using Model Checking

4 citations · 5 across the 3 of their papers we have counts for

collaborators
Showing 2024Show all

1 paper · 1 filter

quant-ph2024★ 1 cited

qSAT: Design of an Efficient Quantum Satisfiability Solver for Hardware Equivalence Checking

Abhoy Kole, Mohammed E. Djeridane, Lennart Weingarten +2

The use of Boolean Satisfiability (SAT) solver for hardware verification incurs exponential run-time in several instances. In this work we have proposed an efficient quantum SAT (q…