35 citations · 56 across the 5 of their papers we have counts for
5 papers
A Highly Scalable, Hybrid, Cross-Platform Timing Analysis Framework Providing Accurate Differential Throughput Estimation via Instruction-Level Tracing
Min-Yih Hsu, Felicitas Hetzelt, David Gens +2
Estimating instruction-level throughput is critical for many applications: multimedia, low-latency networking, medical, automotive, avionic, and industrial control systems all rely…
V0LTpwn: Attacking x86 Processor Integrity from Software
Zijo Kenjar, Tommaso Frassetto, David Gens +2
Fault-injection attacks have been proven in the past to be a reliable way of bypassing hardware-based security measures, such as cryptographic hashes, privilege and access permissi…
When a Patch is Not Enough - HardFails: Software-Exploitable Hardware Bugs
Ghada Dessouky, David Gens, Patrick Haney +6
In this paper, we take a deep dive into microarchitectural security from a hardware designer's perspective by reviewing the existing approaches to detect hardware vulnerabilities d…
Execution Integrity with In-Place Encryption
Dean Sullivan, Orlando Arias, David Gens +3
Instruction set randomization (ISR) was initially proposed with the main goal of countering code-injection attacks. However, ISR seems to have lost its appeal since code-injection…
CAn't Touch This: Practical and Generic Software-only Defenses Against Rowhammer Attacks
Ferdinand Brasser, Lucas Davi, David Gens +2
Rowhammer is a hardware bug that can be exploited to implement privilege escalation and remote code execution attacks. Previous proposals on rowhammer mitigation either require har…