54 citations · 149 across the 12 of their papers we have counts for
7 papers · 1 filter
Geometric Operator Convolutional Neural Network
Yangling Ma, Yixin Luo, Zhouwang Yang
The Convolutional Neural Network (CNN) has been successfully applied in many fields during recent decades; however it lacks the ability to utilize prior domain knowledge when deali…
Architectural Techniques for Improving NAND Flash Memory Reliability
Yixin Luo
Raw bit errors are common in NAND flash memory and will increase in the future. These errors reduce flash reliability and limit the lifetime of a flash memory device. We aim to imp…
Improving 3D NAND Flash Memory Lifetime by Tolerating Early Retention Loss and Process Variation
Yixin Luo, Saugata Ghose, Yu Cai +2
Compared to planar (i.e., two-dimensional) NAND flash memory, 3D NAND flash memory uses a new flash cell design, and vertically stacks dozens of silicon layers in a single chip. Th…
Characterizing, Exploiting, and Mitigating Vulnerabilities in MLC NAND Flash Memory Programming
Yu Cai, Saugata Ghose, Yixin Luo +3
This paper summarizes our work on experimentally analyzing, exploiting, and addressing vulnerabilities in multi-level cell NAND flash memory programming, which was published in the…
Read Disturb Errors in MLC NAND Flash Memory
Yu Cai, Yixin Luo, Saugata Ghose +3
This paper summarizes our work on experimentally characterizing, mitigating, and recovering read disturb errors in multi-level cell (MLC) NAND flash memory, which was published in…
Experimental Characterization, Optimization, and Recovery of Data Retention Errors in MLC NAND Flash Memory
Yu Cai, Yixin Luo, Erich F. Haratsch +3
This paper summarizes our work on experimentally characterizing, mitigating, and recovering data retention errors in multi-level cell (MLC) NAND flash memory, which was published i…
RowClone: Accelerating Data Movement and Initialization Using DRAM
Vivek Seshadri, Yoongu Kim, Chris Fallin +8
In existing systems, to perform any bulk data movement operation (copy or initialization), the data has to first be read into the on-chip processor, all the way into the L1 cache,…