3 citations · 4 across the 2 of their papers we have counts for
2 papers
cs.SE2017★ 3 cited
Towards Evaluating Size Reduction Techniques for Software Model Checking
Gyula Sallai, Ákos Hajdu, Tamás Tóth +1
Formal verification techniques are widely used for detecting design flaws in software systems. Formal verification can be done by transforming an already implemented source code to…
cs.LO2017★ 1 cited
Exploiting Hierarchy in the Abstraction-Based Verification of Statecharts Using SMT Solvers
Bence Czipó, Ákos Hajdu, Tamás Tóth +1
Statecharts are frequently used as a modeling formalism in the design of state-based systems. Formal verification techniques are also often applied to prove certain properties abou…