collaborators

1 paper

physics.ins-det2025

A 28nm Multiply-Accumulate ASIC Architecture for On-Chip Data Compression in MHz Frame Rate X-ray and Electron Pixel Detectors

Rami Rasheedi, Nicholas Contini, Mohamed Adel Gharib +13

Modern X-ray detector systems urgently require compact, efficient, and fast data compression schemes to handle the transmission of big data from pixel arrays, enabling frame rates…