2 citations · 2 across the 4 of their papers we have counts for
4 papers
Work-In-Progress: Accelerating Numpy With OpenBLAS For Open-Source RISC-V Chips
Cyril Koenig, Enrico Zelioli, Frank K. Gürkaynak +1
RISC-V allows for building general-purpose computing platforms with programmable accelerators around a single open-source ISA. However, leveraging heterogeneous SoCs within high-le…
Quark: An Integer RISC-V Vector Processor for Sub-Byte Quantized DNN Inference
MohammadHossein AskariHemmat, Theo Dupuis, Yoan Fournier +8
In this paper, we present Quark, an integer RISC-V vector processor specifically tailored for sub-byte DNN inference. Quark is implemented in GlobalFoundries' 22FDX FD-SOI technolo…
Soft Tiles: Capturing Physical Implementation Flexibility for Tightly-Coupled Parallel Processing Clusters
Gianna Paulin, Matheus Cavalcante, Paul Scheffler +4
Modern high-performance computing architectures (Multicore, GPU, Manycore) are based on tightly-coupled clusters of processing elements, physically implemented as rectangular tiles…
A near-threshold RISC-V core with DSP extensions for scalable IoT Endpoint Devices
Michael Gautschi, Pasquale Davide Schiavone, Andreas Traber +6
Endpoint devices for Internet-of-Things not only need to work under extremely tight power envelope of a few milliwatts, but also need to be flexible in their computing capabilities…