5 papers
SPARC: Automated Root-Cause Analysis of Pre-Silicon Power Side-Channel Leakage in the Processor Design Flow
Andrija NeÅ¡koviÄ, Christian Ewert, Mladen Berekovic +1
Power-Side-Channel Leakage (PSCL) originates from architectural and micro-architectural artifacts in a processor and poses a severe threat to the confidentiality of cryptographic s…
SAILOR: A Scalable and Energy-Efficient Ultra-Lightweight RISC-V for IoT Security
Christian Ewert, Tim Hardow, Melf Fritsch +5
Recently, RISC-V has contributed to the development of IoT devices, requiring architectures that balance energy efficiency, compact area, and integrated security. However, most rec…
Lightweight Unified Sha-3/Shake Architecture with a Fault-Resilient State
Christian Ewert, Amrit Sharma Poudel, Mouadh Ayache +5
Hash functions have become a key part of standard Post-quantum cryptography (PQC) schemes, especially Sha-3 and Shake, calling arXiv:submit/7045552 [cs.AR] 3 Dec 2025 for lightweig…
Nail: Not Another Fault-Injection Framework for Chisel-generated RTL
Robin Sehm, Christian Ewert, Rainer Buchty +2
Fault simulation and emulation are essential techniques for evaluating the dependability of integrated circuits, enabling early-stage vulnerability analysis and supporting the impl…
Secure Software/Hardware Hybrid In-Field Testing for System-on-Chip
Saleh Mulhem, Christian Ewert, Andrija Neskovic +4
Modern Systems-on-Chip (SoCs) incorporate built-in self-test (BIST) modules deeply integrated into the device's intellectual property (IP) blocks. Such modules handle hardware faul…