2 papers
cs.AR2026
CircuitWeave: Topology-Behavior Alignment for Executable Multimodal RTL Generation
Jiahao Feng, Haiyan Qin, Zhiwei Xie +1
Text-only LLMs generate RTL from natural-language specifications, but prose can leave connectivity, register boundaries, and state-output relations implicit even when interfaces an…
cs.AR2025
ReasoningV: Efficient Verilog Code Generation with Adaptive Hybrid Reasoning Model
Haiyan Qin, Zhiwei Xie, Jingjing Li +4
Large Language Models (LLMs) have advanced Verilog code generation significantly, yet face challenges in data quality, reasoning capabilities, and computational efficiency. This pa…