3 papers
cs.AR2025
AIM: Software and Hardware Co-design for Architecture-level IR-drop Mitigation in High-performance PIM
Yuanpeng Zhang, Xing Hu, Xi Chen +10
SRAM Processing-in-Memory (PIM) has emerged as the most promising implementation for high-performance PIM, delivering superior computing density, energy efficiency, and computation…
cs.AR2025
METRO: A Software-Hardware Co-Design of Interconnections for Spatial DNN Accelerators
Zhao Wang, Jingchen Zhu, Zhe Zhou +1
Tiled spatial architectures have proved to be an effective solution to build large-scale DNN accelerators. In particular, interconnections between tiles are critical for high perfo…
cs.AR2024
Theseus: Exploring Efficient Wafer-Scale Chip Design for Large Language Models
Jingchen Zhu, Chenhao Xue, Yiqi Chen +13
The emergence of the large language model~(LLM) poses an exponential growth of demand for computation throughput, memory capacity, and communication bandwidth. Such a demand growth…