17 citations · 31 across the 8 of their papers we have counts for
8 papers
HermiCache: Enclave-Aware Cache Replacement for Trusted Execution Environments
Oussama Elmnaouri, Pascal Cotret, Vianney Lapôtre +1
Trusted Execution Environments (TEEs) protect enclave memory from untrusted software but remain vulnerable to cache-based side-channel attacks due to shared microarchitectural reso…
On The Effect of Replacement Policies on The Security of Randomized Cache Architectures
Moritz Peters, Nicolas Gaudin, Jan Philipp Thoma +4
Randomizing the mapping of addresses to cache entries has proven to be an effective technique for hardening caches against contention-based attacks like Prime+Prome. While attacks…
Benchmarking Quantized Neural Networks on FPGAs with FINN
Quentin Ducasse, Pascal Cotret, Loïc Lagadec +1
The ever-growing cost of both training and inference for state-of-the-art neural networks has brought literature to look upon ways to cut off resources used with a minimal impact o…
A novel lightweight hardware-assisted static instrumentation approach for ARM SoC using debug components
Muhammad Abdul Wahab, Pascal Cotret, Mounir Nasr Allah +4
Most of hardware-assisted solutions for software security, program monitoring, and event-checking approaches require instrumentation of the target software, an operation which can…
A small and adaptive coprocessor for information flow tracking in ARM SoCs
Muhammad Abdul Wahab, Pascal Cotret, Mounir Nasr Allah +4
DIFT (Dynamic Information Flow Tracking) has been a hot topic for more than a decade. Unfortunately, existing hardware DIFT approaches have not been widely used neither by research…
Towards a hardware-assisted information flow tracking ecosystem for ARM processors
Muhammad Abdul Wahab, Pascal Cotret, Mounir Nasr Allah +3
This work details a hardware-assisted approach for information flow tracking implemented on reconfigurable chips. Current solutions are either time-consuming or hardly portable (mo…