17 citations · 55 across the 19 of their papers we have counts for
21 papers
A comprehensive evaluation of spatial co-execution on GPUs using MPS and MIG technologies
Jorge Villarrubia, Luis Costero, Francisco D. Igual +1
To mitigate the increasingly common underutilization of computational resources in modern GPUs, spatial sharing methods enable multiple applications to use them simultaneously. Thi…
Leveraging Multi-Instance GPUs through moldable task scheduling
Jorge Villarrubia, Luis Costero, Francisco D. Igual +1
NVIDIA MIG (Multi-Instance GPU) allows partitioning a physical GPU into multiple logical instances with fully-isolated resources, which can be dynamically reconfigured. This work h…
The Cambrian Explosion of Mixed-Precision Matrix Multiplication for Quantized Deep Learning Inference
Héctor Martínez, Adrián Castelló, Francisco D. Igual +1
Recent advances in deep learning (DL) have led to a shift from traditional 64-bit floating point (FP64) computations toward reduced-precision formats, such as FP16, BF16, and 8- or…
Balanced segmentation of CNNs for multi-TPU inference
Jorge Villarrubia, Luis Costero, Francisco D. Igual +1
In this paper, we propose different alternatives for convolutional neural networks (CNNs) segmentation, addressing inference processes on computing architectures composed by multip…
Improving inference time in multi-TPU systems with profiled model segmentation
Jorge Villarrubia, Luis Costero, Francisco D. Igual +1
In this paper, we systematically evaluate the inference performance of the Edge TPU by Google for neural networks with different characteristics. Specifically, we determine that, g…
Energy efficiency optimization of task-parallel codes on asymmetric architectures
Luis Costero, Francisco D. Igual, Katzalin Olcoz +1
We present a family of policies that, integrated within a runtime task scheduler (Nanox), pursue the goal of improving the energy efficiency of task-parallel executions with no int…
Leveraging knowledge-as-a-service (KaaS) for QoS-aware resource management in multi-user video transcoding
Luis Costero, Francisco D. Igual, Katzalin Olcoz +1
The coexistence of parallel applications in shared computing nodes, each one featuring different Quality of Service (QoS) requirements, carries out new challenges to improve resour…
Acceleration and energy consumption optimization in cascading classifiers for face detection on low-cost ARM big.LITTLE asymmetric architectures
Alberto Corpas, Luis Costero, Guillermo Botella +3
This paper proposes a mechanism to accelerate and optimize the energy consumption of a face detection software based on Haar-like cascading classifiers, taking advantage of the fea…
Automatic Generators for a Family of Matrix Multiplication Routines with Apache TVM
Guillermo Alaejos, Adrián Castelló, Pedro Alonso-Jordá +3
We explore the utilization of the Apache TVM open source framework to automatically generate a family of algorithms that follow the approach taken by popular linear algebra librari…
Co-Design of the Dense Linear AlgebravSoftware Stack for Multicore Processors
Héctor Martínez, Sandra Catalán, Francisco D. Igual +3
This paper advocates for an intertwined design of the dense linear algebra software stack that breaks down the strict barriers between the high-level, blocked algorithms in LAPACK…
Efficient algorithms for computing a rank-revealing UTV factorization on parallel computing architectures
N. Heavner, F. D. Igual, G. Quintana-Ortí +1
The randomized singular value decomposition (RSVD) is by now a well established technique for efficiently computing an approximate singular value decomposition of a matrix. Buildin…
Parallel Implementations for Computing the Minimum Distance of a Random Linear Code on Multicomputers
Gregorio Quintana-Ortí, Fernando Hernando, Francisco D. Igual
The minimum distance of a linear code is a key concept in information theory. Therefore, the time required by its computation is very important to many problems in this area. In th…
Detecting time-fragmented cache attacks against AES using Performance Monitoring Counters
Iván Prada, Francisco D. Igual, Katzalin Olcoz
Cache timing attacks use shared caches in multi-core processors as side channels to extract information from victim processes. These attacks are particularly dangerous in cloud inf…
Programming Parallel Dense Matrix Factorizations with Look-Ahead and OpenMP
Sandra Catalán, Adrián Castelló, Francisco D. Igual +2
We investigate a parallelization strategy for dense matrix factorization (DMF) algorithms, using OpenMP, that departs from the legacy (or conventional) solution, which simply extra…
Fast Algorithms for the Computation of the Minimum Distance of a Random Linear Code
Fernando Hernando, Francisco D. Igual, Gregorio Quintana-Ortí
The minimum distance of a code is an important concept in information theory. Hence, computing the minimum distance of a code with a minimum computational cost is a crucial process…
HeSP: a simulation framework for solving the task scheduling-partitioning problem on heterogeneous architectures
Anton Rey, Francisco D. Igual, Manuel Prieto-Matías
In this paper we describe HeSP, a complete simulation framework to study a general task scheduling-partitioning problem on heterogeneous architectures, which treats recursive task…
Multi-Threaded Dense Linear Algebra Libraries for Low-Power Asymmetric Multicore Processors
Sandra Catalán, José R. Herrero, Francisco D. Igual +2
Dense linear algebra libraries, such as BLAS and LAPACK, provide a relevant collection of numerical tools for many scientific and engineering applications. While there exist high p…
Revisiting Conventional Task Schedulers to Exploit Asymmetry in ARM big.LITTLE Architectures for Dense Linear Algebra
Luis Costero, Francisco D. Igual, Katzalin Olcoz +1
Dealing with asymmetry in the architecture opens a plethora of questions from the perspective of scheduling task-parallel applications, and there exist early attempts to address th…
Performance and Energy Optimization of Matrix Multiplication on Asymmetric big.LITTLE Processors
Sandra Catalán, Francisco D. Igual, Rafael Mayo +3
Asymmetric processors have emerged as an appealing technology for severely energy-constrained environments, especially in the mobile market where heterogeneity in applications is m…
Architecture-Aware Configuration and Scheduling of Matrix Multiplication on Asymmetric Multicore Processors
Sandra Catalán, Francisco D. Igual, Rafael Mayo +2
Asymmetric multicore processors (AMPs) have recently emerged as an appealing technology for severely energy-constrained environments, especially in mobile appliances where heteroge…
Solving Dense Generalized Eigenproblems on Multi-threaded Architectures
José I. Aliaga, Paolo Bientinesi, Davor Davidović +3
We compare two approaches to compute a portion of the spectrum of dense symmetric definite generalized eigenproblems: one is based on the reduction to tridiagonal form, and the oth…