150 citations · 165 across the 4 of their papers we have counts for
4 papers
Reducing DRAM Refresh Overheads with Refresh-Access Parallelism
K. K. Chang, D. Lee, Z. Chishti +4
This article summarizes the idea of "refresh-access parallelism," which was published in HPCA 2014, and examines the work's significance and future potential. The overarching objec…
Improving DRAM Performance by Parallelizing Refreshes with Accesses
Kevin K. Chang, Donghyuk Lee, Zeshan Chishti +4
Modern DRAM cells are periodically refreshed to prevent data loss due to leakage. Commodity DDR DRAM refreshes cells at the rank level. This degrades performance significantly beca…
RowHammer: Reliability Analysis and Security Implications
Yoongu Kim, Ross Daly, Jeremie Kim +6
As process technology scales down to smaller dimensions, DRAM chips become more vulnerable to disturbance, a phenomenon in which different DRAM cells interfere with each other's op…
Reducing Performance Impact of DRAM Refresh by Parallelizing Refreshes with Accesses
Kevin Kai-Wei Chang, Donghyuk Lee, Zeshan Chishti +4
Modern DRAM cells are periodically refreshed to prevent data loss due to leakage. Commodity DDR DRAM refreshes cells at the rank level. This degrades performance significantly beca…