24 citations · 30 across the 4 of their papers we have counts for
5 papers · 1 filter
HetSched: Quality-of-Mission Aware Scheduling for Autonomous Vehicle SoCs
Aporva Amarnath, Subhankar Pal, Hiwot Kassa +6
Systems-on-Chips (SoCs) that power autonomous vehicles (AVs) must meet stringent performance and safety requirements prior to deployment. With increasing complexity in AV applicati…
MicroGrad: A Centralized Framework for Workload Cloning and Stress Testing
Gokul Subramanian Ravi, Ramon Bertran, Pradip Bose +1
We present MicroGrad, a centralized automated framework that is able to efficiently analyze the capabilities, limits and sensitivities of complex modern processors in the face of c…
STOMP: A Tool for Evaluation of Scheduling Policies in Heterogeneous Multi-Processors
Augusto Vega, Aporva Amarnath, John-David Wellman +6
The proliferation of heterogeneous chip multiprocessors in recent years has reached unprecedented levels. Traditional homogeneous platforms have shown fundamental limitations when…
Tolerating Soft Errors in Processor Cores Using CLEAR (Cross-Layer Exploration for Architecting Resilience)
Eric Cheng, Shahrzad Mirkhani, Lukasz G. Szafaryn +8
We present CLEAR (Cross-Layer Exploration for Architecting Resilience), a first of its kind framework which overcomes a major challenge in the design of digital systems that are re…
CLEAR: Cross-Layer Exploration for Architecting Resilience - Combining Hardware and Software Techniques to Tolerate Soft Errors in Processor Cores
Eric Cheng, Shahrzad Mirkhani, Lukasz G. Szafaryn +8
We present a first of its kind framework which overcomes a major challenge in the design of digital systems that are resilient to reliability failures: achieve desired resilience t…