activity
20162020
most citedhXDP: Efficient Software Packet Processing on FPGA NICs

25 citations · 25 across the 2 of their papers we have counts for

collaborators

5 papers

cs.AR202025 cited

hXDP: Efficient Software Packet Processing on FPGA NICs

Marco Spaziani Brunella, Giacomo Belocchi, Marco Bonola +7

FPGA accelerators on the NIC enable the offloading of expensive packet processing tasks from the CPU. However, FPGAs have limited resources that may need to be shared among diverse…

cs.NI2020

Micro SIDs: a solution for Efficient Representation of Segment IDs in SRv6 Networks

Angelo Tulumello, Andrea Mayer, Marco Bonola +8

The Segment Routing (SR) architecture is based on loose source routing. A list of instructions, called segments can be added to the packet headers, to influence the forwarding and…

cs.NI2020

LOcAl DEcisions on Replicated States (LOADER) in programmable data planes: programming abstraction and experimental evaluation

German Sviridov, Marco Bonola, Angelo Tulumello +3

Programmable data planes recently emerged as a prominent innovation in Software Defined Networking (SDN), by permitting support of stateful flow processing functions over hardware…

cs.NI2017

D-STREAMON: from middlebox to distributed NFV framework for network monitoring

Pier Luigi Ventre, Alberto Caponi, Giuseppe Siracusano +4

Many reasons make NFV an attractive paradigm for IT security: lowers costs, agile operations and better isolation as well as fast security updates, improved incident responses and…

cs.NI2016

Open Packet Processor: a programmable architecture for wire speed platform-independent stateful in-network processing

Giuseppe Bianchi, Marco Bonola, Salvatore Pontarelli +3

This paper aims at contributing to the ongoing debate on how to bring programmability of stateful packet processing tasks inside the network switches, while retaining platform inde…