3 papers
cs.AR2025
Instruction-Based Coordination of Heterogeneous Processing Units for Acceleration of DNN Inference
Anastasios Petropoulos, Theodore Antonakopoulos
This paper presents an instruction-based coordination architecture for Field-Programmable Gate Array (FPGA)-based systems with multiple high-performance Processing Units (PUs) for…
cs.ET2025
A Distributed Emulation Environment for In-Memory Computing Systems
Eleni Bougioukou, Anastasios Petropoulos, Nikolaos Toulgaridis +2
In-memory computing technology is used extensively in artificial intelligence devices due to lower power consumption and fast calculation of matrix-based functions. The development…
cs.AR2025
A Scalable FPGA Architecture With Adaptive Memory Utilization for GEMM-Based Operations
Anastasios Petropoulos, Theodore Antonakopoulos
Deep neural network (DNN) inference relies increasingly on specialized hardware for high computational efficiency. This work introduces a field-programmable gate array (FPGA)-based…