461 citations · 751 across the 33 of their papers we have counts for
5 papers · 1 filter
Efficient Realization of Householder Transform through Algorithm-Architecture Co-design for Acceleration of QR Factorization
Farhad Merchant, Tarun Vatwani, Anupam Chattopadhyay +3
We present efficient realization of Householder Transform (HT) based QR factorization through algorithm-architecture co-design where we achieve performance improvement of 3-90x in-…
Accelerating BLAS on Custom Architecture through Algorithm-Architecture Co-design
Farhad Merchant, Tarun Vatwani, Anupam Chattopadhyay +3
Basic Linear Algebra Subprograms (BLAS) play key role in high performance and scientific computing applications. Experimentally, yesteryear multicore and General Purpose Graphics P…
Accelerating BLAS and LAPACK via Efficient Floating Point Architecture Design
Farhad Merchant, Anupam Chattopadhyay, Soumyendu Raha +2
Basic Linear Algebra Subprograms (BLAS) and Linear Algebra Package (LAPACK) form basic building blocks for several High Performance Computing (HPC) applications and hence dictate p…
Ancilla-free Reversible Logic Synthesis via Sorting
Anupam Chattopadhyay, Sharif Md Khairul Hossain
Reversible logic synthesis is emerging as a major research component for post-CMOS computing devices, in particular Quantum computing. In this work, we link the reversible logic sy…
Reversible Logic Circuit Complexity Analysis via Functional Decomposition
Anupam Chattopadhyay, Anubhab Baksi
Reversible computation is gaining increasing relevance in the context of several post-CMOS technologies, the most prominent of those being Quantum computing. One of the key theoret…