4 citations · 14 across the 7 of their papers we have counts for
6 papers · 1 filter
ProcessorFuzz: Guiding Processor Fuzzing using Control and Status Registers
Sadullah Canakci, Chathura Rajapaksha, Anoop Mysore Nataraja +4
As the complexity of modern processors has increased over the years, developing effective verification strategies to identify bugs prior to manufacturing has become critical. Undis…
Puppeteer: A Random Forest-based Manager for Hardware Prefetchers across the Memory Hierarchy
Furkan Eris, Marcia S. Louis, Kubra Eris +2
Over the years, processor throughput has steadily increased. However, the memory throughput has not increased at the same rate, which has led to the memory wall problem in turn inc…
Architecting Optically-Controlled Phase Change Memory
Aditya Narayan, Yvain Thonnart, Pascal Vivet +2
Phase Change Memory (PCM) is an attractive candidate for main memory as it offers non-volatility and zero leakage power, while providing higher cell densities, longer data retentio…
MGPU-TSM: A Multi-GPU System with Truly Shared Memory
Saiful A. Mojumder, Yifan Sun, Leila Delshadtehrani +6
The sizes of GPU applications are rapidly growing. They are exhausting the compute and memory resources of a single GPU, and are demanding the move to multiple GPUs. However, the p…
Custom Tailored Suite of Random Forests for Prefetcher Adaptation
Furkan Eris, Sadullah Canakci, Cansu Demirkiran +1
To close the gap between memory and processors, and in turn improve performance, there has been an abundance of work in the area of data/instruction prefetcher designs. Prefetchers…
HALCONE : A Hardware-Level Timestamp-based Cache Coherence Scheme for Multi-GPU systems
Saiful A. Mojumder, Yifan Sun, Leila Delshadtehrani +6
While multi-GPU (MGPU) systems are extremely popular for compute-intensive workloads, several inefficiencies in the memory hierarchy and data movement result in a waste of GPU reso…