3 citations · 8 across the 5 of their papers we have counts for
5 papers
HeapSafe: Securing Unprotected Heaps in RISC-V
Asmit De, Swaroop Ghosh
RISC-V is a promising open-source architecture primarily targeted for embedded systems. Programs compiled using the RISC-V toolchain can run bare-metal on the system, and, as such,…
TrappeD: DRAM Trojan Designs for Information Leakage and Fault Injection Attacks
Karthikeyan Nagarajan, Asmit De, Mohammad Nasim Imtiaz Khan +1
In this paper, we investigate the advanced circuit features such as wordline- (WL) underdrive (prevents retention failure) and overdrive (assists write) employed in the peripherals…
RF-Trojan: Leaking Kernel Data Using Register File Trojan
Mohammad Nasim Imtiaz Khan, Asmit De, Swaroop Ghosh
Register Files (RFs) are the most frequently accessed memories in a microprocessor for fast and efficient computation and control logic. Segment registers and control registers are…
Attack resilient architecture to replace embedded Flash with STTRAM in homogeneous IoTs
Asmit De, Mohammad Nasim Imtiaz Khan, Swaroop Ghosh
Spin-Transfer Torque RAM (STTRAM) is an emerging Non-Volatile Memory (NVM) technology that provides better endurance, write energy and performance than traditional NVM technologies…
Cache Bypassing and Checkpointing to Circumvent Data Security Attacks on STTRAM
Nitin Rathi, Asmit De, Helia Naeimi +1
Spin-Transfer Torque RAM (STTRAM) is promising for cache applications. However, it brings new data security issues that were absent in volatile memory counterparts such as Static R…