activity
20102022
most citedPriority-based Parameter Propagation for Distributed DNN Training

42 citations · 57 across the 7 of their papers we have counts for

collaborators

7 papers

cs.AR2022★ 2 cited

Writes Hurt: Lessons in Cache Design for Optane NVRAM

Alexandra Fedorova, Keith Smith, Keith Bostic +3

Intel OptaneTM DC Persistent Memory resides on the memory bus and approaches DRAM in access latency. One avenue for its adoption is to employ it in place of persistent storage; ano…

cs.DC2020

Trash Talk: Accelerating Garbage Collection on Integrated GPUs is Worthless

Mohammad Dashti, Alexandra Fedorova

Systems integrating heterogeneous processors with unified memory provide seamless integration among these processors with minimal development complexity. These systems integrate ac…

cs.CR2019★ 2 cited

Bandwidth-Efficient Transaction Relay for Bitcoin

Gleb Naumenko, Gregory Maxwell, Pieter Wuille +2

Bitcoin is a top-ranked cryptocurrency that has experienced huge growth and survived numerous attacks. The protocols making up Bitcoin must therefore accommodate the growth of the…

cs.DC2019★ 42 cited

Priority-based Parameter Propagation for Distributed DNN Training

Anand Jayarajan, Jinliang Wei, Garth Gibson +2

Data parallel training is widely used for scaling distributed deep neural network (DNN) training. However, the performance benefits are often limited by the communication-heavy par…

cs.PF2016★ 3 cited

DINAMITE: A modern approach to memory performance profiling

Svetozar Miucin, Conor Brady, Alexandra Fedorova

Diagnosing and fixing performance problems on multicore machines with deep memory hierarchies is extremely challenging. Certain problems are best addressed when we can analyze the…

cs.AR2015★ 8 cited

Performance monitoring for multicore embedded computing systems on FPGAs

Lesley Shannon, Eric Matthews, Nicholas Doyle +1

When designing modern embedded computing systems, most software programmers choose to use multicore processors, possibly in combination with general-purpose graphics processing uni…

cs.PF2010

Scaling Turbo Boost to a 1000 cores

Ananth Narayan S, Somsubhra Sharangi, Alexandra Fedorova

The Intel Core i7 processor code named Nehalem provides a feature named Turbo Boost which opportunistically varies the frequencies of the processor's cores. The frequency of a core…