17 citations · 64 across the 12 of their papers we have counts for
8 papers · 1 filter
CMDS: Cross-layer Dataflow Optimization for DNN Accelerators Exploiting Multi-bank Memories
Man Shi, Steven Colleman, Charlotte VanDeMieroop +4
Deep neural networks (DNN) use a wide range of network topologies to achieve high accuracy within diverse applications. This model diversity makes it impossible to identify a singl…
PATRONoC: Parallel AXI Transport Reducing Overhead for Networks-on-Chip targeting Multi-Accelerator DNN Platforms at the Edge
Vikram Jain, Matheus Cavalcante, Nazareno Bruschi +6
Emerging deep neural network (DNN) applications require high-performance multi-core hardware acceleration with large data bursts. Classical network-on-chips (NoCs) use serial packe…
Benchmarking and modeling of analog and digital SRAM in-memory computing architectures
Pouya Houshmand, Jiacong Sun, Marian Verhelst
In-memory-computing is emerging as an efficient hardware paradigm for deep neural network accelerators at the edge, enabling to break the memory wall and exploit massive computatio…
SALSA: Simulated Annealing based Loop-Ordering Scheduler for DNN Accelerators
Victor J. B. Jung, Arne Symons, Linyan Mei +2
To meet the growing need for computational power for DNNs, multiple specialized hardware architectures have been proposed. Each DNN layer should be mapped onto the hardware with th…
DPU-v2: Energy-efficient execution of irregular directed acyclic graphs
Nimish Shah, Wannes Meert, Marian Verhelst
A growing number of applications like probabilistic machine learning, sparse linear algebra, robotic navigation, etc., exhibit irregular data flow computation that can be modeled w…
Acceleration of probabilistic reasoning through custom processor architecture
Nimish Shah, Laura I. Galindez Olascoaga, Wannes Meert +1
Probabilistic reasoning is an essential tool for robust decision-making systems because of its ability to explicitly handle real-world uncertainty, constraints and causal relations…