85 citations · 97 across the 9 of their papers we have counts for
11 papers
Configurable p-Neurons Using Modular p-Bits
Saleh Bunaiyan, Mohammad Alsharif, Abdelrahman S. Abdelrahman +5
Probabilistic bits (p-bits) have recently been employed in neural networks (NNs) as stochastic neurons with sigmoidal probabilistic activation functions. Nonetheless, there remain…
MAESTRO: Multi-Agent Evaluation Suite for Testing, Reliability, and Observability
Tie Ma, Yixi Chen, Vaastav Anand +8
We present MAESTRO, an evaluation suite for the testing, reliability, and observability of LLM-based MAS. MAESTRO standardizes MAS configuration and execution through a unified int…
OffRAC: Offloading Through Remote Accelerator Calls
Ziyi Yang, Krishnan B. Iyer, Yixi Chen +4
Modern applications increasingly demand ultra-low latency for data processing, often facilitated by host-controlled accelerators like GPUs and FPGAs. However, significant delays re…
ResiLogic: Leveraging Composability and Diversity to Design Fault and Intrusion Resilient Chips
Ahmad T. Sheikh, Ali Shoker, Suhaib A. Fahmy +1
A long-standing challenge is the design of chips resilient to faults and glitches. Both fine-grained gate diversity and coarse-grained modular redundancy have been used in the past…
Resilient and Secure Programmable System-on-Chip Accelerator Offload
Inês Pinto Gouveia, Ahmad T. Sheikh, Ali Shoker +2
Computational offload to hardware accelerators is gaining traction due to increasing computational demands and efficiency challenges. Programmable hardware, like FPGAs, offers a pr…
High Throughput Multidimensional Tridiagonal Systems Solvers on FPGAs
Kamalavasan Kamalakkannan, Istvan Z. Reguly, Suhaib A. Fahmy +1
We present a design space exploration for synthesizing optimized, high-throughput implementations of multiple multi-dimensional tridiagonal system solvers on FPGAs. Re-evaluating t…