2 papers
cs.DC2019
Yosys+nextpnr: an Open Source Framework from Verilog to Bitstream for Commercial FPGAs
David Shah, Eddie Hung, Clifford Wolf +3
This paper introduces a fully free and open source software (FOSS) architecture-neutral FPGA framework comprising of Yosys for Verilog synthesis, and nextpnr for placement, routing…
cs.AR2016
Enabling Effective FPGA Debug using Overlays: Opportunities and Challenges
Fatemeh Eslami, Eddie Hung, Steven J. E. Wilton
FPGAs are going mainstream. Major companies that were not traditionally FPGA-focused are now seeking ways to exploit the benefits of reconfigurable technology and provide it to the…