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cs.AR2025
A 0.32 mm 100 Mb/s 223 mW ASIC in 22FDX for Joint Jammer Mitigation, Channel Estimation, and SIMO Data Detection
Jonas Elmiger, Fabian Stuber, Oscar Castañeda +2
We present the first single-input multiple-output (SIMO) receiver ASIC that jointly performs jammer mitigation, channel estimation, and data detection. The ASIC implements a recent…
cs.AR2025
A Jammer-Resilient 2.87 mm 1.28 MS/s 310 mW Multi-Antenna Synchronization ASIC in 65 nm
Flurin Arquint, Oscar Castañeda, Gian Marti +1
We present the first ASIC implementation of jammer-resilient multi-antenna time synchronization. The ASIC implements a recent algorithm that mitigates jamming attacks on synchroniz…
cs.AR2024
A Jammer-Mitigating 267 Mb/s 3.78 mm 583 mW 328 Multi-User MIMO Receiver in 22FDX
Florian Bucheli, Oscar Castañeda, Gian Marti +1
We present the first multi-user (MU) multiple-input multiple-output (MIMO) receiver ASIC that mitigates jamming attacks. The ASIC implements a recent nonlinear algorithm that perfo…