449 citations · 508 across the 13 of their papers we have counts for
13 papers
Analyzing the Performance Portability of SYCL across CPUs, GPUs, and Hybrid Systems with SW Sequence Alignment
Manuel Costanzo, Enzo Rucci, Carlos García-Sánchez +2
The high-performance computing (HPC) landscape is undergoing rapid transformation, with an increasing emphasis on energy-efficient and heterogeneous computing environments. This co…
Comparing Performance and Portability between CUDA and SYCL for Protein Database Search on NVIDIA, AMD, and Intel GPUs
Manuel Costanzo, Enzo Rucci, Carlos García Sánchez +2
The heterogeneous computing paradigm has led to the need for portable and efficient programming solutions that can leverage the capabilities of various hardware devices, such as NV…
Assessing Opportunities of SYCL for Biological Sequence Alignment on GPU-based Systems
Manuel Costanzo, Enzo Rucci, Carlos García Sánchez +2
Bioinformatics and Computational Biology are two fields that have been exploiting GPUs for more than two decades, being CUDA the most used programming language for them. However, a…
Migrating CUDA to oneAPI: A Smith-Waterman Case Study
Manuel Costanzo, Enzo Rucci, Carlos Garcia Sanchez +2
To face the programming challenges related to heterogeneous computing, Intel recently introduced oneAPI, a new programming environment that allows code developed in Data Parallel C…
Performance vs Programming Effort between Rust and C on Multicore Architectures: Case Study in N-Body
Manuel Costanzo, Enzo Rucci, Marcelo Naiouf +1
Historically, Fortran and C have been the default programming languages in High-Performance Computing (HPC). In both, programmers have primitives and functions available that allow…
Early Experiences Migrating CUDA codes to oneAPI
Manuel Costanzo, Enzo Rucci, Carlos García Sanchez +1
The heterogeneous computing paradigm represents a real programming challenge due to the proliferation of devices with different hardware characteristics. Recently Intel introduced…
Comparison of HPC Architectures for Computing All-Pairs Shortest Paths. Intel Xeon Phi KNL vs NVIDIA Pascal
Manuel Costanzo, Enzo Rucci, Ulises Costi +2
Today, one of the main challenges for high-performance computing systems is to improve their performance by keeping energy consumption at acceptable levels. In this context, a cons…
Soft Errors Detection and Automatic Recovery based on Replication combined with different Levels of Checkpointing
Diego Montezanti, Enzo Rucci, Armando De Giusti +3
Handling faults is a growing concern in HPC. In future exascale systems, it is projected that silent undetected errors will occur several times a day, increasing the occurrence of…
Blocked All-Pairs Shortest Paths Algorithm on Intel Xeon Phi KNL Processor: A Case Study
Enzo Rucci, Armando De Giusti, Marcelo Naiouf
Manycores are consolidating in HPC community as a way of improving performance while keeping power efficiency. Knights Landing is the recently released second generation of Intel X…
Some stylized facts of the Bitcoin market
Aurelio F. Bariviera, María José Basgall, Waldo Hasperué +1
In recent years a new type of tradable assets appeared, generically known as cryptocurrencies. Among them, the most widespread is Bitcoin. Given its novelty, this paper investigate…
First Experiences Optimizing Smith-Waterman on Intel's Knights Landing Processor
Enzo Rucci, Carlos Garcia, Guillermo Botella +3
The well-known Smith-Waterman (SW) algorithm is the most commonly used method for local sequence alignments. However, SW is very computationally demanding for large protein databas…
Quantum Enhanced Correlation Matrix Memories via States Orthogonalisation
Mario Mastriani, Marcelo Naiouf
This paper introduces a Quantum Correlation Matrix Memory (QCMM) and Enhanced QCMM (EQCMM), which are useful to work with quantum memories. A version of classical Gram-Schmidt orth…
Automatic Mapping Tasks to Cores - Evaluating AMTHA Algorithm in Multicore Architectures
Laura De Giusti, Franco Chichizola, Marcelo Naiouf +2
The AMTHA (Automatic Mapping Task on Heterogeneous Architectures) algorithm for task-to-processors assignment and the MPAHA (Model of Parallel Algorithms on Heterogeneous Architect…