119 citations · 465 across the 38 of their papers we have counts for
48 papers
PEak: A Single Source of Truth for Hardware Design and Verification
Caleb Donovick, Ross Daly, Jackson Melchert +4
Domain-specific languages for hardware can significantly enhance designer productivity, but sometimes at the cost of ease of verification. On the other hand, ISA specification lang…
Combining Finite Combination Properties: Finite Models and Busy Beavers
Guilherme Toledo, Yoni Zohar, Clark Barrett
This work is a part of an ongoing effort to understand the relationships between properties used in theory combination. We here focus on including two properties that are related t…
Partitioning Strategies for Distributed SMT Solving
Amalee Wilson, Andres Noetzli, Andrew Reynolds +3
For many users of Satisfiability Modulo Theories (SMT) solvers, the solver's performance is the main bottleneck in their application. One promising approach for improving performan…
Combining Combination Properties: An Analysis of Stable Infiniteness, Convexity, and Politeness
Guilherme Vicentin de Toledo, Yoni Zohar, Clark Barrett
We make two contributions to the study of theory combination in satisfiability modulo theories. The first is a table of examples for the combinations of the most common model-theor…
DNN Verification, Reachability, and the Exponential Function Problem
Omri Isac, Yoni Zohar, Clark Barrett +1
Deep neural networks (DNNs) are increasingly being deployed to perform safety-critical tasks. The opacity of DNNs, which prevents humans from reasoning about them, presents new saf…
Proof-Stitch: Proof Combination for Divide and Conquer SAT Solvers
Abhishek Nair, Saranyu Chattopadhyay, Haoze Wu +2
With the increasing availability of parallel computing power, there is a growing focus on parallelizing algorithms for important automated reasoning problems such as Boolean satisf…
Reasoning About Vectors using an SMT Theory of Sequences
Ying Sheng, Andres Nötzli, Andrew Reynolds +7
Dynamic arrays, also referred to as vectors, are fundamental data structures used in many programs. Modeling their semantics efficiently is crucial when reasoning about such progra…
Scalable Verification of GNN-based Job Schedulers
Haoze Wu, Clark Barrett, Mahmood Sharif +2
Recently, Graph Neural Networks (GNNs) have been applied for scheduling jobs over clusters, achieving better performance than hand-crafted heuristics. Despite their impressive perf…
Automating System Configuration
Nestan Tsiskaridze, Maxwell Strange, Makai Mann +4
The increasing complexity of modern configurable systems makes it critical to improve the level of automation in the process of system configuration. Such automation can also impro…
Scaling Up Hardware Accelerator Verification using A-QED with Functional Decomposition
Saranyu Chattopadhyay, Florian Lonsing, Luca Piccolboni +12
Hardware accelerators (HAs) are essential building blocks for fast and energy-efficient computing systems. Accelerator Quick Error Detection (A-QED) is a recent formal technique wh…
Effective Pre-Silicon Verification of Processor Cores by Breaking the Bounds of Symbolic Quick Error Detection
Karthik Ganesan, Florian Lonsing, Srinivasa Shashank Nuthakki +6
We present a novel approach to pre-silicon verification of processor designs. The purpose of pre-silicon verification is to find logic bugs in a design at an early stage and thus a…
lazybvtoint at the SMT Competition 2020
Yoni Zohar, Ahmed Irfan, Makai Mann +3
lazybvtoint is a new prototype SMT-solver, that will participate in the incremental and non-incremental tracks of the \qfbv logic.
Automated Design Space Exploration of CGRA Processing Element Architectures using Frequent Subgraph Analysis
Jackson Melchert, Kathleen Feng, Caleb Donovick +5
The architecture of a coarse-grained reconfigurable array (CGRA) processing element (PE) has a significant effect on the performance and energy efficiency of an application running…
Politeness and Stable Infiniteness: Stronger Together
Ying Sheng, Yoni Zohar, Christophe Ringeissen +3
We make two contributions to the study of polite combination in satisfiability modulo theories. The first contribution is a separation between politeness and strong politeness, by…
DeepCert: Verification of Contextually Relevant Robustness for Neural Network Image Classifiers
Colin Paterson, Haoze Wu, John Grese +3
We introduce DeepCert, a tool-supported method for verifying the robustness of deep neural network (DNN) image classifiers to contextually relevant perturbations such as blur, haze…
Counterexample-Guided Prophecy for Model Checking Modulo the Theory of Arrays
Makai Mann, Ahmed Irfan, Alberto Griggio +2
We develop a framework for model checking infinite-state systems by automatically augmenting them with auxiliary variables, enabling quantifier-free induction proofs for systems th…
An SMT-Based Approach for Verifying Binarized Neural Networks
Guy Amir, Haoze Wu, Clark Barrett +1
Deep learning has emerged as an effective approach for creating modern software systems, with neural networks often surpassing hand-crafted systems. Unfortunately, neural networks…
Global Optimization of Objective Functions Represented by ReLU Networks
Christopher A. Strong, Haoze Wu, Aleksandar Zeljić +4
Neural networks can learn complex, non-convex functions, and it is challenging to guarantee their correct behavior in safety-critical contexts. Many approaches exist to find failur…
Smt-Switch: a solver-agnostic C++ API for SMT Solving
Makai Mann, Amalee Wilson, Cesare Tinelli +1
This extended abstract describes work in progress on Smt-Switch, an open-source, solver-agnostic API for SMT solving. Smt-Switch provides an abstract interface, which can be implem…
fault: A Python Embedded Domain-Specific Language For Metaprogramming Portable Hardware Verification Components
Lenny Truong, Steven Herbst, Rajsekhar Setaluri +8
While hardware generators have drastically improved design productivity, they have introduced new challenges for the task of verification. To effectively cover the functionality of…
A Theoretical Framework for Symbolic Quick Error Detection
Florian Lonsing, Subhasish Mitra, Clark Barrett
Symbolic quick error detection (SQED) is a formal pre-silicon verification technique targeted at processor designs. It leverages bounded model checking (BMC) to check a design for…
Politeness for the Theory of Algebraic Datatypes
Ying Sheng, Yoni Zohar, Christophe Ringeissen +3
Algebraic datatypes, and among them lists and trees, have attracted a lot of interest in automated reasoning and Satisfiability Modulo Theories (SMT). Since its latest stable versi…
Parallelization Techniques for Verifying Neural Networks
Haoze Wu, Alex Ozdemir, Aleksandar Zeljić +7
Inspired by recent successes with parallel optimization techniques for solving Boolean satisfiability, we investigate a set of strategies and heuristics that aim to leverage parall…
Resources: A Safe Language Abstraction for Money
Sam Blackshear, David L. Dill, Shaz Qadeer +4
Smart contracts are programs that implement potentially sophisticated transactions on modern blockchain platforms. In the rapidly evolving blockchain environment, smart contract pr…