37 citations · 100 across the 16 of their papers we have counts for
16 papers
Implementation of Real-Time Automotive SAR Imaging
Marcel Hoffmann, Theresa Noegel, Christian Schüßler +4
This paper presents measures to reduce the computation time of automotive synthetic aperture radar (SAR) imaging to achieve real-time capability. For this, the image formation, whi…
Closing the Performance Gap with Modern C++
Thomas Heller, Hartmut Kaiser, Patrick Diehl +2
On the way to Exascale, programmers face the increasing challenge of having to support multiple hardware architectures from the same code base. At the same time, portability of cod…
Estimation of Non-Functional Properties for Embedded Hardware with Application to Image Processing
Christian Herglotz, Jürgen Seiler, André Kaup +3
In recent years, due to a higher demand for portable devices, which provide restricted amounts of processing capacity and battery power, the need for energy and time efficient hard…
Bridging the Architecture Gap: Abstracting Performance-Relevant Properties of Modern Server Processors
Johannes Hofmann, Christie L. Alappat, Georg Hager +2
We describe a universal modeling approach for predicting single- and multicore runtime of steady-state loops on server processors. To this end we strictly differentiate between app…
On the accuracy and usefulness of analytic energy models for contemporary multicore processors
Johannes Hofmann, Georg Hager, Dietmar Fey
This paper presents refinements to the execution-cache-memory performance model and a previously published power model for multicore processors. The combination of both enables a v…
An analysis of core- and chip-level architectural features in four generations of Intel server processors
Johannes Hofmann, Georg Hager, Gerhard Wellein +1
This paper presents a survey of architectural features among four generations of Intel server processors (Sandy Bridge, Ivy Bridge, Haswell, and Broad- well) with a focus on perfor…
Evaluating Ternary Adders using a hybrid Memristor / CMOS approach
Dietmar Fey
This paper investigates the potentials of using a hybrid memristor CMOS technology, called MeMOS, for the realisation of ternary adders. Ternary adders exploit the qualitative adva…
An ECM-based energy-efficiency optimization approach for bandwidth-limited streaming kernels on recent Intel Xeon processors
Johannes Hofmann, Dietmar Fey
We investigate an approach that uses low-level analysis and the execution-cache-memory (ECM) performance model in combination with tuning of hardware parameters to lower energy req…
Performance analysis of the Kahan-enhanced scalar product on current multi- and manycore processors
Johannes Hofmann, Dietmar Fey, Michael Riedmann +3
We investigate the performance characteristics of a numerically enhanced scalar product (dot) kernel loop that uses the Kahan algorithm to compensate for numerical errors, and desc…
Analysis of Intel's Haswell Microarchitecture Using The ECM Model and Microbenchmarks
Johannes Hofmann, Dietmar Fey, Jan Eitzinger +2
This paper presents an in-depth analysis of Intel's Haswell microarchitecture for streaming loop kernels. Among the new features examined is the dual-ring Uncore design, Cluster-on…
Execution-Cache-Memory Performance Model: Introduction and Validation
Johannes Hofmann, Jan Eitzinger, Dietmar Fey
This report serves two purposes: To introduce and validate the Execution-Cache-Memory (ECM) performance model and to provide a thorough analysis of current Intel processor architec…
OpenCL 2.0 for FPGAs using OCLAcc
Franz Richter-Gottfried, Alexander Ditter, Dietmar Fey
Designing hardware is a time-consuming and complex process. Realization of both, embedded and high-performance applications can benefit from a design process on a higher level of a…
Performance analysis of the Kahan-enhanced scalar product on current multicore processors
Johannes Hofmann, Dietmar Fey, Jan Eitzinger +2
We investigate the performance characteristics of a numerically enhanced scalar product (dot) kernel loop that uses the Kahan algorithm to compensate for numerical errors, and desc…
A Holistic Approach for Modeling and Synthesis of Image Processing Applications for Heterogeneous Computing Architectures
Christian Hartmann, Anna Yupatova, Marc Reichenbach +2
Image processing applications are common in every field of our daily life. However, most of them are very complex and contain several tasks with different complexities which result…
Automatic Optimization of Hardware Accelerators for Image Processing
Oliver Reiche, Konrad Häublein, Marc Reichenbach +3
In the domain of image processing, often real-time constraints are required. In particular, in safety-critical applications, such as X-ray computed tomography in medical imaging or…
Proceedings of the DATE Friday Workshop on Heterogeneous Architectures and Design Methods for Embedded Image Systems (HIS 2015)
Frank Hannig, Dietmar Fey, Anton Lokhmotov
This volume contains the papers accepted at the DATE Friday Workshop on Heterogeneous Architectures and Design Methods for Embedded Image Systems (HIS 2015), held in Grenoble, Fran…