34 citations · 153 across the 43 of their papers we have counts for
19 papers · 1 filter
Sensing to Intelligence: Principles for Neuromorphic Circuits and Systems
Saptarshi Maiti, Chetan Singh Thakur
Neuromorphic engineering began with the idea that the physical behavior of a system could itself be used for computation, taking inspiration from the way nervous systems sense, ada…
When Routers, Switches and Interconnects Compute: A processing-in-interconnect Paradigm for Scalable Neuromorphic AI
Madhuvanthi Srivatsav, Chiranjib Bhattacharyya, Shantanu Chakrabartty +1
Routing, switching, and the interconnect fabric are essential components in implementing large-scale neuromorphic computing architectures. While this fabric plays only a supporting…
Higher-Order Neuromorphic Ising Machines -- Autoencoders and Fowler-Nordheim Annealers are all you need for Scalability
Faiek Ahsan, Saptarshi Maiti, Zihao Chen +8
We report a higher-order neuromorphic Ising machine that exhibits superior scalability compared to architectures based on quadratization, while also achieving state-of-the-art qual…
EventF2S: Asynchronous and Sparse Spiking AER Framework using Neuromorphic-Friendly Algorithm
Lakshmi Annamalai, Chetan Singh Thakur
Bio-inspired Address Event Representation (AER) sensors have attracted significant popularity owing to their low power consumption, high sparsity, and high temporal resolution. Spi…
RAMAN: A Re-configurable and Sparse tinyML Accelerator for Inference on Edge
Adithya Krishna, Srikanth Rohit Nudurupati, Chandana D G +4
Deep Neural Network (DNN) based inference at the edge is challenging as these compute and data-intensive algorithms need to be implemented at low cost and low power while meeting t…
Neuromorphic Computing with AER using Time-to-Event-Margin Propagation
Madhuvanthi Srivatsav R, Shantanu Chakrabartty, Chetan Singh Thakur
Address-Event-Representation (AER) is a spike-routing protocol that allows the scaling of neuromorphic and spiking neural network (SNN) architectures to a size that is comparable t…
A Neuromorphic Proto-Object Based Dynamic Visual Saliency Model with an FPGA Implementation
Jamal Lottier Molin, Chetan Singh Thakur, Ralph Etienne-Cummings +1
The ability to attend to salient regions of a visual scene is an innate and necessary preprocessing step for both biological and engineered systems performing high-level visual tas…
Neuromorphic In-Memory Computing Framework using Memtransistor Cross-bar based Support Vector Machines
P. Kumar, A. R. Nair, O. Chatterjee +4
This paper presents a novel framework for designing support vector machines (SVMs), which does not impose restriction on the SVM kernel to be positive-definite and allows the user…
Large-Scale Neuromorphic Spiking Array Processors: A quest to mimic the brain
Chetan Singh Thakur, Jamal Molin, Gert Cauwenberghs +12
Neuromorphic engineering (NE) encompasses a diverse range of approaches to information processing that are inspired by neurobiological systems, and this feature distinguishes neuro…
An FPGA-based Massively Parallel Neuromorphic Cortex Simulator
Runchun Wang, Chetan Singh Thakur, Andre van Schaik
This paper presents a massively parallel and scalable neuromorphic cortex simulator designed for simulating large and structurally connected spiking neural networks, such as comple…
A Stochastic Approach to STDP
Runchun Wang, Chetan Singh Thakur, Tara Julia Hamilton +2
We present a digital implementation of the Spike Timing Dependent Plasticity (STDP) learning rule. The proposed digital implementation consists of an exponential decay generator ar…
Investigation of event-based memory surfaces for high-speed tracking, unsupervised feature extraction and object recognition
Saeed Afshar, Gregory Cohen, Tara Julia Hamilton +2
In this paper we compare event-based decaying and time based-decaying memory surfaces for high-speed eventbased tracking, feature extraction, and object classification using an eve…
A Reconfigurable Mixed-signal Implementation of a Neuromorphic ADC
Ying Xu, Chetan Singh Thakur, Tara Julia Hamilton +3
We present a neuromorphic Analogue-to-Digital Converter (ADC), which uses integrate-and-fire (I&F) neurons as the encoders of the analogue signal, with modulated inhibitions to dec…
A compact aVLSI conductance-based silicon neuron
Runchun Wang, Chetan Singh Thakur, Tara Julia Hamilton +2
We present an analogue Very Large Scale Integration (aVLSI) implementation that uses first-order lowpass filters to implement a conductance-based silicon neuron for high-speed neur…
A neuromorphic hardware architecture using the Neural Engineering Framework for pattern recognition
Runchun Wang, Chetan Singh Thakur, Tara Julia Hamilton +2
We present a hardware architecture that uses the Neural Engineering Framework (NEF) to implement large-scale neural networks on Field Programmable Gate Arrays (FPGAs) for performin…
An Online Learning Algorithm for Neuromorphic Hardware Implementation
Chetan Singh Thakur, Runchun Wang, Saeed Afshar +4
We propose a sign-based online learning (SOL) algorithm for a neuromorphic hardware framework called Trainable Analogue Block (TAB). The TAB framework utilises the principles of ne…
A neuromorphic hardware framework based on population coding
Chetan Singh Thakur, Tara Julia Hamilton, Runchun Wang +2
In the biological nervous system, large neuronal populations work collaboratively to encode sensory stimuli. These neuronal populations are characterised by a diverse distribution…
FPGA Implementation of the CAR Model of the Cochlea
Chetan Singh Thakur, Tara Julia Hamilton, Jonathan Tapson +2
The front end of the human auditory system, the cochlea, converts sound signals from the outside world into neural impulses transmitted along the auditory pathway for further proce…
Turn Down that Noise: Synaptic Encoding of Afferent SNR in a Single Spiking Neuron
Saeed Afshar, Libin George, Jonathan Tapson +3
We have added a simplified neuromorphic model of Spike Time Dependent Plasticity (STDP) to the Synapto-dendritic Kernel Adapting Neuron (SKAN). The resulting neuron model is the fi…