34 citations · 42 across the 7 of their papers we have counts for
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cs.SE2022★ 2 cited
An Automated Testing and Debugging Toolkit for Gate-Level Logic Synthesis Applications
Siang-Yun Lee, Heinz Riener, Giovanni De Micheli
Correctness and robustness are essential for logic synthesis applications, but they are often only tested with a limited set of benchmarks. Moreover, when the application fails on…
cs.SE2018
Synthesizing Adaptive Test Strategies from Temporal Logic Specifications
Roderick Bloem, Goerschwin Fey, Fabian Greif +4
Constructing good test cases is difficult and time-consuming, especially if the system under test is still under development and its exact behavior is not yet fixed. We propose a n…