126 citations · 492 across the 43 of their papers we have counts for
6 papers · 1 filter
Critical Path Aware Timing-Driven Global Placement for Large-Scale Heterogeneous FPGAs
He Jiang, Yi Guo, Shikai Guo +4
Timing optimization during global placement is critical for achieving optimal circuit performance and remains a key challenge in modern Field Programmable Gate Array (FPGA) design.…
TIT: A Tree-Structured Instruction Tuning Approach for LLM-Based Code Translation
He Jiang, Yufu Wang, Hao Lin +5
Large Language Models (LLMs) have shown strong performance in automated source-to-target code translation through pretraining on extensive code corpora. However, mainstream LLM-bas…
A Novel Mutation Based Method for Detecting FPGA Logic Synthesis Tool Bugs
Yi Zhang, He Jiang, Xiaochen Li +3
FPGA (Field-Programmable Gate Array) logic synthesis tools are key components in the EDA (Electronic Design Automation) toolchain. They convert hardware designs written in descript…
FuncGNN: Learning Functional Semantics of Logic Circuits with Graph Neural Networks
Qiyun Zhao
As integrated circuit scale grows and design complexity rises, effective circuit representation helps support logic synthesis, formal verification, and other automated processes in…
Towards an Oracle for Binary Decomposition Under Compilation Variance
Ang Jia, He Jiang, Zhilei Ren +5
Third-Party Library (TPL) detection, which identifies reused libraries in binary code, is critical for software security analysis. At its core, TPL detection depends on binary deco…
A Novel Interactive-Guided Differential Testing Approach for FPGA Simulation Debugger Tools
Shikai Guo, Xiaoyu Wang, Xiaochen Li +2
Field-Programmable Gate Array (FPGA) development tool chains are widely used in FPGA design, simulation, and verification in critical areas like communications, automotive electron…